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参数资料
| 型号： | ZL2106ALCFTK |
| 厂商： | Intersil |
| 文件页数： | 18/29页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 6A 36QFN |
| 标准包装： | 1,000 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.54 V ~ 5.5 V |
| 输入电压： | 4.5 V ~ 14 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 200kHz ~ 1MHz |
| 电流 - 输出： | 6A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-VFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 36-QFN |
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ZL2106
10X the value of C B so that a discharged C B does not cause the
voltage on it to droop excessively during a C B recharge pulse.
C VRA SELECTION
This capacitor is used to both stabilize and provide noise filtering
for the analog 5V reference supply. It should be between 2.2μF
and 10μF, should use a semi-stable X5R or X7R dielectric
ceramic capacitor with a low ESR (less than 10m Ω ) and should
have a rating of 6.3V or more.
THERMAL CONSIDERATIONS
In typical applications, the ZL2106’s high efficiency will limit the
internal power dissipation inside the package. However, in
applications that require a high ambient operating temperature
the user must perform some thermal analysis to ensure that the
ZL2106’s maximum junction temperature is not exceeded.
The ZL2106 has a maximum junction temperature limit of
Loop Compensation
The ZL2106 operates as a voltage-mode synchronous buck
controller with a fixed frequency PWM scheme. Although the
ZL2106 uses a digital control loop, it operates much like a
traditional analog PWM controller. Figure 17 is a simplified block
diagram of the ZL2106 control loop, which differs from an analog
control loop only by the constants in the PWM and compensation
blocks. As in the analog controller case, the compensation block
compares the output voltage to the desired voltage reference and
compensation zeroes are added to keep the loop stable. The
resulting integrated error signal is used to drive the PWM logic,
converting the error signal to a duty cycle to drive the internal
MOSFETs.
V IN
(
) [ ( R
) ( 1 ? D ) ]
) ( D ) + ( R
P Q = I
(EQ. 11)
+125°C, and the internal over-temperature limiting circuitry will
force the device to shut down if its junction temperature exceeds
this threshold. In order to calculate the maximum junction
temperature, the user must first calculate the power dissipated
inside the IC (P Q ) as expressed in Equation 11:
2
LOAD DS ( ON ) QH DS ( ON ) QL
DPWM
D
1-D
L
C
R C
R O
V OUT
The maximum operating junction temperature can then be
T j max = T PCB + ( P Q × θ JC )
calculated using Equation 12:
(EQ. 12)
Compensation
Where T PCB is the expected maximum printed circuit board
temperature and θ JC is the junction-to-case thermal resistance
for the ZL2106 package.
FIGURE 17. CONTROL LOOP BLOCK DIAGRAM
TABLE 12. RESISTOR SETTING FOR LOOP COMPENSATION
Current Sensing and Current Limit Threshold
Selection
The ZL2106 incorporates a patented “lossless” current sensing
method across the internal low-side MOSFET that is independent
of r DS(ON) variations, including temperature. The default value for
the gain, which does not represent a r DS(ON) value, and the offset
of the internal current sensing circuit can be modified by the
IOUT_CAL_GAIN and IOUT_CAL_OFFSET commands.
The design should include a current limiting mechanism to
protect the power supply from damage and prevent excessive
current from being drawn from the input supply in the event that
the output is shorted to ground or an overload condition is
imposed on the output. Current limiting is accomplished by
sensing the current through the circuit during a portion of the
duty cycle. The current limit threshold is set to 9A by default. The
current limit threshold can set to a custom value via the
I 2 C/SMBus interface. Please refer to Application Note AN2033
for further details.
Additionally, the ZL2106 gives the power supply designer several
choices for the fault response during over or under current
conditions. The user can select the number of violations allowed
before declaring a fault, a blanking time and the action taken when
a fault is detected. The blanking time represents the time when no
current measurement is taken. This is to avoid taking a reading just
after a current load step (less accurate due to potential ringing).
Please refer to Application note AN2033 for further details.
G (dB)
24
27
27
27
27
27
27
27
27
27
27
30
30
30
30
30
30
30
30
30
30
33
Q
0.150
0.150
0.150
0.150
0.300
0.300
0.300
0.300
0.600
0.600
0.600
0.150
0.150
0.150
0.300
0.300
0.300
0.300
0.600
0.600
0.600
0.150
fsw/fn
115.000
115.000
69.147
41.577
115.000
69.147
41.577
25.000
69.147
41.577
25.000
115.000
69.147
41.577
115.000
69.147
41.577
25.000
69.147
41.577
25.000
115.000
FC
(k)
Open or 11
Low or 10
13.3
14.7
16.2
17.8
19.6
21.5
23.7
26.1
28.7
High or 12.1
31.6
34.8
38.3
42.2
46.4
51.1
56.2
61.9
68.1
75.0
18
FN6852.6
February 20, 2013
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