ZL50408
Data Sheet
79
Zarlink Semiconductor Inc.
Port 8: (CPU Port)
Bit [5]:
Frame loopback.
0: Disable frame from sending back to its source port. (Default)
1: Allow frame to send back to its source port
In a regular ethernet switch, a packet should never be receive and forwarded to
the same port. Setting the bit allows it to happen.
This is not the same as an ingress MAC loopback. The destination MAC address
has to be stored (learned) in the MCT and associated with the originating source
port. The frame loopback will only work for unicast packets.
Bit [6]:
Link Heart Beat Receive
0: Disable (Default). Also clears all MAC LHB status.
1: Enable
Bit [7]:
Soft reset.
0: Normal operation (Default)
1: Reset. Not self clearing.
Bits [1:0]:
Reserved
Bit [2]:
Enable special write to 2 registers in a single write operation.
0: Disable (Default)
1: Enable
Should be enabled only in serial mode and disabled in 8/16-bit mode.
Bits [4:3]:
Enable insertion of 2-byte CPU information in CPU frame packet in Serial + MII
mode
00: No information is inserted
01: Insert 2-byte of CPU information
10: Reserved
11: Insert 6-byte of padding + 2-byte of CPU information (Default)
In port-based VLAN mode, the CPU MII interface must be in “No information is
inserted” mode (ECR4P8[4:3]='00'). In tagged-based VLAN mode, the CPU MII
interface supports all three modes (0,2,8 bytes insertion).
Bit [5]:
Frame loopback.
0: Disable frame from sending back to its source port. (Default)
1: Allow frame to send back to its source port
In a regular ethernet switch, a packet should never be receive and forwarded to
the same port. Setting the bit allows it to happen.
This is not the same as an ingress MAC loopback. The destination MAC address
has to be stored (learned) in the MCT and associated with the originating source
port. The frame loopback will only work for unicast packets.
Bit [6]:
Reserved
Bit [7]:
Soft reset.
0: Normal operation (Default)
1: Reset. Not self clearing.