参数资料
型号: 24LCS61/ST
元件分类: PROM
英文描述: 128 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8
封装: TSSOP-8
文件页数: 4/17页
文件大小: 249K
代理商: 24LCS61/ST
24LCS61/62
DS21226C-page 12
Preliminary
1999 Microchip Technology Inc.
7.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the stop condition for a write com-
mand has been issued from the master, the device ini-
tiates the internally timed write cycle. ACK polling can
be initiated immediately. This involves the master send-
ing a start condition followed by the control byte for a
write command and then sending the Device ID byte for
that particular device. If the device is still busy with the
write cycle, then no ACK will be returned after the
Device ID byte. If no ACK is returned, then the start bit,
control byte and ID byte must be re-sent. If the cycle is
complete, then the device will return the ACK and the
master can then proceed with the next command. See
Figure 7-1 for flow diagram.
FIGURE 7-1:
ACKNOWLEDGE POLLING
FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Did Device
Acknowledge
(ACK = 0)?
Next
Operation
NO
YES
Send Control byte and
Device ID byte
Device ID
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24LCS61T/ST 功能描述:电可擦除可编程只读存储器 128x8 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8
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