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参数资料
| 型号： | 24LCS61/ST |
| 元件分类： | PROM |
| 英文描述： | 128 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8 |
| 封装： | TSSOP-8 |
| 文件页数： | 5/17页 |
| 文件大小： | 249K |
| 代理商： | 24LCS61/ST |
24LCS61/62
1999 Microchip Technology Inc.
Preliminary
DS21226C-page 13
8.0
READ OPERATIONS
Read operations are initiated in a similar way as the
write operations. There are three basic types of read
operations: current address read, random read, and
sequential read.
8.1
Current Address Read
The 24LCS61/62 contains an address counter that
maintains the address of the last word accessed, inter-
nally incremented by one. Therefore, if the previous
read access was to address n, the next current address
read operation would access data from address n + 1.
Upon receipt of the correct control byte and ID byte, the
24LCS61/62 issues an acknowledge and transmits the
eight bit data word. The master will not acknowledge
the transfer but does generate a stop condition and the
24LCS61/62 discontinues transmission (Figure 8-1).
8.2
Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
24LCS61/62 as part of a write operation. After the ID
byte and word address are sent, the master generates
a start condition following the acknowledge. This termi-
nates the write operation, but not before the internal
address pointer is set. Then the master sends the con-
trol byte and ID byte for a read command. The
24LCS61/62 will then issue an acknowledge and trans-
mits the eight bit data word. The master will not
acknowledge the transfer but does generate a stop
condition and the 24LCS61/62 discontinues transmis-
sion (Figure 8-2).
8.3
Sequential Read
Sequential reads are initiated in the same way as a ran-
dom read except that after the 24LCS61/62 transmits
the first data byte, the master issues an acknowledge
as opposed to a stop condition in a random read. This
directs the 24LCS61/62 to transmit the next sequen-
tially addressed 8-bit word (Figure 8-3).
To provide sequential reads the 24LCS61/62 contains
an internal address pointer which is incremented by
one at the completion of each operation. This address
pointer allows the entire memory contents to be serially
read during one operation. The internal address pointer
will
automatically
roll
over
from
address
7Fh
(24LCS61) or FFh (24LCS62) to address 00h.
FIGURE 8-1:
CURRENT ADDRESS READ
FIGURE 8-2:
RANDOM READ
FIGURE 8-3:
SEQUENTIAL READ
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
P
S
T
O
P
CONTROL
BYTE
S
T
A
R
T
DATA
A
C
K
A
C
K
DEVICE
ID BYTE
N
O
A
C
K
1
0
10 O 00 1
E
OE Bit = EDS Pin Output Enable; see Section 9.0
CONTROL
BYTE
A
C
K
A
C
K
A
C
K
ADDRESS
BYTE
CONTROL
BYTE
A
C
K
DATA
BYTE
DEVICE
ID BYTE
A
C
K
DEVICE
ID BYTE
S
T
A
R
T
S
T
A
R
T
S
T
O
P
N
O
A
C
K
1
0
10 O 01 0
S
1
01 0 O 00 1
E
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
ID
BYTE
DATA n
DATA n + 1
DATA n + 2
DATA n + X
A
C
K
A
C
K
A
C
K
A
C
K
P
N
O
A
C
K
S
T
O
P
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 24LCS61T/SN | 功能描述:电可擦除可编程只读存储器 128x8 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 24LCS61T/ST | 功能描述:电可擦除可编程只读存储器 128x8 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 24LCS61T-I/SN | 功能描述:电可擦除可编程只读存储器 128x8 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 24LCS61T-I/ST | 功能描述:电可擦除可编程只读存储器 128x8 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 24LCS62/P | 功能描述:电可擦除可编程只读存储器 256x8 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
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