参数资料
型号: 25AA512-I/SM
厂商: Microchip Technology
文件页数: 19/36页
文件大小: 0K
描述: IC EEPROM 512KBIT 20MHZ 8SOIC
标准包装: 90
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 512K (64K x 8)
速度: 20MHz
接口: SPI 3 线串行
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-SOIC(0.209",5.30mm 宽)
供应商设备封装: 8-SOIJ
包装: 管件
产品目录页面: 1450 (CN2011-ZH PDF)
25AA512
2.12
RELEASE FROM DEEP
POWER-DOWN AND READ
ELECTRONIC SIGNATURE
Release from Deep Power-Down mode and Read
Electronic Signature is entered by driving CS low,
followed by the RDID instruction code (Figure 2-12)
and then a dummy address of 16 bits (A15-A0). After
Once the device has entered Deep Power-Down
mode all instructions are ignored except the Release
from Deep Power-down and Read Electronic Signa-
ture command. This command can also be used when
the device is not in Deep power-down to read the
electronic signature out on the SO pin unless another
command is being executed such as Erase, Program
or Write Status Register.
the last bit of the dummy address is clock in, the 8-bit
Electronic Signature is clocked out on the SO pin.
After the signature has been read out at least once,
the sequence can be terminated by driving CS high.
The device will then return to Standby mode and will
wait to be selected so it can be given new instructions.
If additional clock cycles are sent after the electronic
signature has been read once, it will continue to output
the signature on the SO line until the sequence is
terminated.
FIGURE 2-12:
CS
RELEASE FROM DEEP POWER-DOWN AND READ ELECTRONIC SIGNATURE
0
1
2
3
4
5
6
7
8
9 1 0 11
2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 3 1
SCK
Instruction
16-bit Address
SI
1
0
1
0
1
0
1
1 15 14 13 12
2
1
0
High-Impedance
Electronic Signature Out
SO
7
0
6
0
5
1
4
0
3
1
2
0
1
0
0
1
Manufacturer’s ID = 0x29
Driving CS high after the 8-bit RDID command but before the Electronic Signature has been transmitted will still ensure
the device will be taken out of Deep Power-Down mode. However, there is a delay T REL that occurs before the device
returns to Standby mode (I CCS ), as shown in Figure 2-13.
FIGURE 2-13:
CS
RELEASE FROM DEEP POWER-DOWN
0
1
2
3
4
5
6
7
T REL
SCK
Instruction
SI
1
0
1
0
1
0
1
1
High-Impedance
SO
? 2010 Microchip Technology Inc.
DS22021F-page 19
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