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参数资料
| 型号： | 4460-TCE10D434-EK |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 46/56页 |
| 文件大小： | 0K |
| 描述： | KIT EZRADIO TEST CARD SI4460 TX |
| 设计资源： | 4460-TCE10D434 BOM 4460-TCE10D434 PCB 4460-TCE10D434 SCH |
| 标准包装： | 1 |
| 系列： | EZRadioPRO® |
| 类型： | 收发器，ISM |
| 频率： | 434MHz |
| 适用于相关产品： | Si4460 |
| 已供物品： | 板 |
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Si4464/63/61/60
9. Pin Descriptions: Si4464/63/61/60
SDN
1
20 19 18 17 16
RXp 2
15 nSEL
RXn 3
TX 4
NC 5
GND
PAD
14 SDI
13 SDO
12 SCLK
Pin
Pin Name
I/0
6
7
8
9
10 11 nIRQ
Description
Shutdown Input Pin .
1
SDN
I
0–VDD V digital input. SDN should be = 0 in all modes except Shutdown mode.
When SDN = 1, the chip will be completely shut down, and the contents of the
registers will be lost.
2
3
RXp
RXn
I
I
Differential RF Input Pins of the LNA.
See application schematic for example matching network.
Transmit Output Pin.
4
TX
O
The PA output is an open-drain connection, so the L-C match must supply
VDD (+3.3 VDC nominal) to this pin.
5
NC
No Connect. Not connected internally to any circuitry.
6
7
8
9
VDD
TXRAMP
VDD
GPIO0
VDD
O
VDD
I/O
+1.8 to +3.6 V Supply Voltage Input to Internal Regulators.
The recommended VDD supply voltage is +3.3 V.
Programmable Bias Output with Ramp Capability for External FET PA.
See "5.4. Transmitter (TX)" on page 34.
+1.8 to +3.6 V Supply Voltage Input to Internal Regulators.
The recommended VDD supply voltage is +3.3 V.
General Purpose Digital I/O.
May be configured through the registers to perform various functions including:
10
GPIO1
I/O
Microcontroller Clock Output, FIFO status, POR, Wake-Up timer, Low Battery
Detect, TRSW, AntDiversity control, etc.
General Microcontroller Interrupt Status Output.
When the Si4463/61 exhibits any one of the interrupt events, the nIRQ pin will
11
nIRQ
O
be set low = 0. The Microcontroller can then determine the state of the inter-
rupt by reading the interrupt status. No external resistor pull-up is required, but
it may be desirable if multiple interrupt lines are connected.
46
Rev 1.2
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