参数资料
型号: 48e30
厂商: Holtek Semiconductor Inc.
英文描述: 8-Bit I/O Type MCU (With EEPROM)
中文描述: 8位I / O型微控制器(带EEPROM)
文件页数: 5/44页
文件大小: 351K
代理商: 48E30
HT48E30
Rev. 0.00
13
January 12, 2004
Preliminary
The registers status is summarized in the following table.
Register
Reset
(Power On)
WDT Time-out
(Normal Operation)
RES Reset
(Normal Operation)
RES Reset
(HALT)
WDT Time-out
(HALT)*
TMR
xxxx xxxx
uuuu uuuu
TMRC
00-0 1000
uu-u uuuu
Program
Counter
000H
MP
-xxx xxxx
-uuu uuuu
ACC
xxxx xxxx
uuuu uuuu
TBLP
xxxx xxxx
uuuu uuuu
TBLH
--xx xxxx
--uu uuuu
STATUS
--00 xxxx
--1u uuuu
--uu uuuu
--01 uuuu
--11 uuuu
INTC
--00 0000
--uu uuuu
WDTS
0000 0111
uuuu uuuu
PA
1111 1111
uuuu uuuu
PAC
1111 1111
uuuu uuuu
PB
1111 1111
uuuu uuuu
PBC
1111 1111
uuuu uuuu
PC
--11 1111
--uu uuuu
PCC
--11 1111
--uu uuuu
PG
---- ---1
---- ---u
PGC
---- ---1
---- ---u
EECR
1000 ----
uuuu ----
Note:
* stands for warm reset
u stands for unchanged
x stands for unknown
Timer/Event Counter
Timer/event counters (TMR) is implemented in the
microcontroller. The timer/event counter contains an 8-bit
programmable count-up counter and the clock may come
from an external source or from the system clock by 4.
Using the internal clock sources, there are 2 reference
time-bases for the timer/event counter. The internal
clock source can be selected as coming from fSYS or by
options. Using an external clock input allows the user to
count external events, measure time internals or pulse
widths, or generate an accurate time base. While using
the internal clock allows the user to generate an accu-
rate time base.
The timer/event counter can generate PFD signals by
using external or internal clock and the PFD frequency
is determine by the equation fINT/[2
(256-N)].
There are 2 registers related to the timer/event counter;
TMR ([0DH]), TMRC ([0EH]). Two physical registers are
mapped to TMR location; writing TMR makes the start-
ing value be placed in the timer/event counter preload
register and reading TMR retrieves the contents of the
timer/event counter. The TMRC is a timer/event counter
control register, which defines some options.
The TM0, TM1 bits define the operating mode. The
event count mode is used to count external events,
which means the clock source comes from an external
(TMR) pin. The timer mode functions as a normal timer
with the clock source coming from the fINT clock. The
pulse width measurement mode can be used to count the
high or low level duration of the external signal (TMR). The
counting is based on the fINT clock.
In the event count or timer mode, once the timer/event
counter starts counting, it will count from the current
contents in the timer/event counter to FFH. Once over-
flow occurs, the counter is reloaded from the timer/event
counter preload register and generates the interrupt re-
quest flag (TF; bit 5 of INTC) at the same time.
In the pulse width measurement mode with the TON and
TE bits equal to one, once the TMR has received a tran-
sient from low to high (or high to low if the TE bits is
0)
it will start counting until the TMR returns to the original
level and resets the TON. The measured result will re-
main in the timer/event counter even if the activated
transient occurs again. In other words, only one cycle
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