参数资料
型号: 71M6521FE-IMR/F
厂商: Maxim Integrated
文件页数: 43/107页
文件大小: 0K
描述: IC ENERGY METER 32K FLASH 68-QFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
系列: Single Converter Technology®
测量误差: 0.4%
电源电压: 3 V ~ 3.6 V
测量仪表类型: 单相,双相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-VFQFN 裸露焊盘
供应商设备封装: 64-QFN(7.5x7.5)
包装: 带卷 (TR)
71M6521DE/DH/FE Data Sheet
EEPROM Interface
The 71M6521DE/DH/FE provides hardware support for either type of EEPROM interface, a two-pin interface and a
three-pin interface. The interfaces use the EECTRL and EEDATA registers for communication.
Two-Pin EEPROM Interface
The dedicated 2-pin serial interface communicates with external EEPROM devices. The interface is multiplexed onto
pins DIO4 (SCK) and DIO5 (SDA) controlled by the DIO_EEX bit I/O RAM (see I/O RAM Table). The MPU
communicates with the interface through two SFR registers: EEDATA and EECTRL . If the MPU wishes to write a byte
of data to EEPROM, it places the data in EEDATA and then writes the ‘Transmit’ command (CMD = 0011) to EECTRL .
This initiates the transmit operation. The transmit operation is finished when the BUSY bit falls. Interrupt INT5 is also
asserted when BUSY falls. The MPU can then check the RX_ACK bit to see if the EEPROM acknowledged the
transmission.
A byte is read by writing the ‘Receive’ command (CMD = 0001) to EECTRL and waiting for the BUSY bit to fall. Upon
completion, the received data is in EEDATA . The serial transmit and receive clock is 78kHz during each transmission,
and the clock is held in a high state until the next transmission. The bits in EECTRL are shown in Table 57.
The EEPROM interface can also be operated by controlling the DIO4 and DIO5 pins directly (“bit-banging”).
However, controlling DIO4 and DIO5 directly is discouraged, because it may tie up the MPU to the point
where it may become too busy to process interrupts .
Status
Bit
7
6
5
4
Name
ERROR
BUSY
RX_ACK
TX_ACK
Read/
Write
R
R
R
R
Reset
State
0
0
1
1
Polarity
Positive
Positive
Negative
Negative
Description
1 when an illegal command is received.
1 when serial data bus is busy.
0 indicates that the EEPROM sent an ACK bit.
0 indicates when an ACK bit has been sent to the EEPROM
CMD
0000
Operation
No-op. Applying the no-op command will stop the I 2 C clock
(SCK, DIO4). Failure to issue the no-op command will keep
the SCK signal toggling.
3-0
CMD
[3:0]
W
0
Positive,
see CMD
Table
0001
0011
0101
Receive a byte from EEPROM and send ACK.
Transmit a byte to EEPROM.
Issue a ‘STOP’ sequence.
0110
1001
Others
Receive the last byte from EEPROM, do not send ACK.
Issue a ‘START’ sequence.
No Operation, set the ERROR bit.
Table 57: EECTRL Status Bits
Rev 3
Page: 43 of 107
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