参数资料
型号: 71M6521FE-IMR/F
厂商: Maxim Integrated
文件页数: 81/107页
文件大小: 0K
描述: IC ENERGY METER 32K FLASH 68-QFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
系列: Single Converter Technology®
测量误差: 0.4%
电源电压: 3 V ~ 3.6 V
测量仪表类型: 单相,双相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-VFQFN 裸露焊盘
供应商设备封装: 64-QFN(7.5x7.5)
包装: 带卷 (TR)
71M6521DE/DH/FE Data Sheet
VERSION[7:0]
VREF_CAL
VREF_DIS
WAKE_ARM
WAKE_PRD
WAKE_RES
WD_RST
WD_OVF
WE
2006
2004[7]
2004[3]
20A9[7]
20A9[2:0]
20A9[3]
SFRE8[7]
2002[2]
201F7:0]
--
0
0
0
001
0
0
0
--
--
0
1
--
--
--
0
0
--
R
R/W
R/W
W
R/W
R/W
W
R/W
W
The version index. This word may be read by firmware to determine
t he silicon version.
VERSION [7:0] Silicon Version
0000 0110 A06
Brings VREF to VREF pad. This feature is disabled when
VREF_DIS =1.
Disables the internal voltage reference.
Arm the autowake timer. Writing a 1 to this bit arms the autowake
timer and presets it with the values presently in WAKE_PRD and
WAKE_RES . The autowake timer is reset and disarmed whenever
the MPU is in MISSION mode or BROWNOUT mode. The timer
must be armed at least three RTC cycles before the SLEEP or LCD-
ONLY mode is commanded.
Sleep time. Time= WAKE_PRD[2:0]*WAKE_RES. Default=001.
Maximum value is 7.
Resolution of WAKE timer: 1 – 1 minute, 0 – 2.5 seconds.
WD timer bit: Possible operations to this bit are:
Read: Gets the status of the flag IE_PLLFALL
Write 0: Clears the flag
Write 1:.Resets the WDT
The WD overflow status bit. This bit is set when the WD timer
overflows. It is powered by the non-volatile supply and at bootup
will indicate if the part is recovering from a WD overflow or a power
fault. This bit should be cleared by the MPU on bootup. It is also
automatically cleared when RESET is high.
Write operations on the RTC registers must be preceded by a write
operation to WE .
Rev 3
Page: 81 of 107
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