参数资料
型号: 71M6543F-IGT/F
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP100
封装: LEAD FREE, LQFP-100
文件页数: 151/157页
文件大小: 2178K
代理商: 71M6543F-IGT/F
71M6543F/H and 71M6543G/GH Data Sheet
v1.2
2008–2011 Teridian Semiconductor Corporation
93
The MPU has the responsibility of computing the necessary sample gain compensation values required for
each sensor channel based on the sensed temperature. Teridian provides demonstration code that
implements the GAIN_ADJx compensation equation shown below. The resulting GAIN_ADJx values are
stored by the MPU in five CE RAM locations GAIN_ADJ0-GAIN_ADJ5 (CE RAM 0x40-0x44). The
demonstration code thus provides a suitable implementation of temperature compensation, but other
methods are possible in MPU firmware by utilizing the on-chip temperature sensor while storing the sample
gain adjustment results in the CE RAM GAIN_ADJn storage locations. The demonstration code maintains
five separate sets of PPMC and PPMC2 coefficients and computes five separate GAIN_ADJn values
based on the sensed temperature using the equation below:
23
2
14
2
_
100
2
_
10
16385
_
PPMC
X
TEMP
PPMC
X
TEMP
ADJx
GAIN
+
+
=
The GAIN_ADJn values stored by the MPU in CE RAM are used by the CE to gain adjust (i.e., multiply)
the sample in each corresponding sensor channel. A GAIN_ADJx value of 16,384 (i.e., 2
14)corresponds to
unity gain, while values less than 16,384 attenuate the samples and values greater than 16,384 amplify
the samples.
In the above equation, TEMP_X is the deviation from nominal or calibration temperature expressed in
multiples of 0.1 °C. The 10x and 100x factors seen in the above equation are due to 0.1
oC scaling of
TEMP_X. For example, if the calibration (reference) temperature is 22 °C and the measured temperature
is 27 °C, then 10*TEMP_X = (27-22) x 10 = 50 (decimal), which represents a +5 °C deviation from 22 °C.
In the demonstration code, TEMP_X is calculated in the MPU from the STEMP[10:0] temperature sensor
reading using the equation provided below and is scaled in 0.1°C units. See 2.5.5 71M6543 Temperature
Sensor on page 55 for the equation to calculate temperature in °C from the STEMP[10:0] reading.
Table 68 shows the five GAIN_ADJx equation output storage locations and the voltage or current
measurements for which they compensate.
Table 68: GAIN_ADJx Compensation Channels (Figure 3, Figure 32, Table 2)
Gain Adjustment Output
CE RAM Address
Sensor Channel(s)
(pin names)
Compensation For:
GAIN_ADJ0
0x40
VADC8 (VA)
VADC9 (VB)
VADC10 (VC)
VREF in 71M6543 and Voltage Divider
Resistors
GAIN_ADJ1
0x41
IADC0-IADC1
VREF in 71M6543, CT and Burden
Resistor (Neutral Current)
GAIN_ADJ2
0x42
IADC2-IADC3
VREF in 71M6543, CT and Burden
Resistor (Phase A)
GAIN_ADJ3
0x43
IADC4-IADC5
VREF in 71M6543, CT and Burden
Resistor (Phase B)
GAIN_ADJ4
0x44
IADC6-IADC7
VREF in 71M6543, CT and Burden
Resistor (Phase C)
In the demonstration code, the shape of the temperature compensation second-order parabolic curve is
determined by the values stored in the PPMC (1
st order coefficient) and PPMC2 (2nd order coefficient),
which are typically setup by the MPU at initialization time from values that are stored in EEPROM.
To disable temperature compensation in the demonstration code, PPMC and PPMC2 are both set to zero
for each of the five GAIN_ADJx channels. To enable temperature compensation, the PPMC and PPMC2
coefficients are set with values that match the expected VREF temperature variation and optionally the
corresponding sensor circuit (i.e., the CT and burden resistor for current channels or the resistor divider
network for the voltage channels).
In the 71M6543F and 71M6543G (±0.5% energy accuracy), the required VREF compensation coefficients
PPMC and PPMC2 are calculated from readable on-chip non-volatile fuses (see 4.5.2Temperature
Coefficients for the 71M6543F). These coefficients are designed to achieve ±40 ppm/°C for VREF.
For the 71M6543H and 71M6543GH (±0.1% energy accuracy), coefficients specific to each individual
device can be calculated from values read from additional on-chip fuses that characterize the VREF
相关PDF资料
PDF描述
71M6543H-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543F-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543H-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543G-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543GH-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
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