参数资料
型号: 71M6543GH-IGTR/F
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP100
封装: LEAD FREE, LQFP-100
文件页数: 152/157页
文件大小: 2178K
代理商: 71M6543GH-IGTR/F
71M6543F/H and 71M6543G/GH Data Sheet
94
2008–2011 Teridian Semiconductor Corporation
v1.2
behavior of each individual part across industrial temperatures (see 4.5.3 Temperature Coefficients for
the 71M6543H). The resulting tracking of the reference VREF voltage is within ±10 ppm/°C.
4.6
Connecting I
2C EEPROMs
I
2C EEPROMs or other I2C compatible devices should be connected to the DIO pins SEGDIO2 and
SEGDIO3, as shown in Figure 33.
Pullup resistors of roughly 10 k
to V3P3D (to ensure operation in BRN mode) should be used for both
SDCK and SDATA signals. The DIO_EEX (I/O RAM 0x2456[7:6]) field must be set to 01 in order to convert
the DIO pins SEGDIO2 and SEGDIO3 to I
2C pins SCL and SDATA.
Figure 33: I
2C EEPROM Connection
4.7
Connecting Three-Wire EEPROMs
Wire EEPROMs and other compatible devices should be connected to the DIO pins SEGDIO2 and
SEGDIO3, as described in 2.5.11 EEPROM Interface on page 66.
4.8
UART0 (TX/RX)
The UART0 RX pin should be pulled down by a 10 k
resistor and additionally protected by a 100 pF
ceramic capacitor, as shown in Figure 34.
Figure 34: Connections for UART0
4.9
Optical Interface (UART1)
The OPT_TX and OPT_RX pins can be used for a regular serial interface (by connecting a RS_232
transceiver for example), or they can be used to directly operate optical components (for example, an
infrared diode and phototransistor implementing a FLAG interface). Figure 35 shows the basic connections
TX
RX
71M6543
10 k
Ω
100 pF
RX
TX
DIO2
DIO3
EEPROM
SDCK
SDATA
V3P3D
10 k
Ω
10 k
Ω
71M6543
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