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| 型号： | 73S8023C-IMR/F |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 4/27页 |
| 文件大小： | 0K |
| 描述： | IC SMART CARD INTERFACE 32-QFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 控制器类型： | 智能卡接口 |
| 电源电压： | 2.7 V ~ 3.6 V |
| 电流 - 电源： | 4.9mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN（5x5） |
| 包装： | 带卷 (TR) |
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73S8023C Data Sheet
DS_8023C_019
12
Rev. 1.5
CMDVCC
VCC
IO
OFF
RSTIN
RST
STROBE
CLK
t0 - Deactivation starts after
CMDVCC is set high or OFF falls due to card removal or fault
t4 - VCC is shut down
(Note: Host should set STROBE low when
CMDVCC is set high, otherwise CLK may be truncated.
CLK truncation may occur if
an OFF event is triggered)
t3 - IO falls approx 2us after CLK falls
t1 - RST falls approx. 0.5us after deactivation begins
t2 - CLK falls approx. 7.5us after RST falls
-- OR --
t0 t1 t2 t3
t5
t4
t5 - VCC goes to 0 after discharge of VCC capacitor, approx 100us after deactivation begins
Figure 4: Synchronous Deactivation Operation – CKSEL = High
8.3
Activation Sequence (Asynchronous Mode)
The 73S8023C smart card interface IC has an internal 10 ms delay at power-on reset or upon application
of VDD > VDDF
1.
CMDVCC is set low.
or upon exit of Power Down mode. The card interface may only be activated when
OFF is
high which indicates a card is present. No activation is allowed at this time.
CMDVCC (edge triggered)
must then be set low to activate the card.
The following steps list the activation sequence and the timing of the card control signals when the
system controller sets
CMDVCC low while the RSTIN is low:
2.
Next, the internal VCC control circuit checks the presence of VCC at the end of t1. In normal operation,
the voltage VCC to the card becomes valid during t1. If VCC does not become valid, then OFF goes
low to report a fault to the system controller, and the power VCC
3.
Turn I/O (AUX1, AUX2) to reception mode at the end of t
to the card is turned off.
2
4.
CLK is applied to the card at the end of t
.
3
5.
RST is a copy of RSTIN after t
.
4. RSTIN may be set high before t 4, however the sequencer won’t set
RST high until 42000 clock cycles after the start of CLK.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 73S8024C-DB | 功能描述:界面开发工具 73S8024C Demo Brd RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| 73S8024C-IL/F | 功能描述:I2C 接口集成电路 Smart Card Interface ISO7816-3 & EVM4.0 RoHS:否 制造商:NXP Semiconductors 电源电压-最大:5.5 V 电源电压-最小:2.3 V 最大工作频率:400 KHz 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-16 |
| 73S8024C-ILR/F | 功能描述:输入/输出控制器接口集成电路 Smart Card Interface ISO7816-3 & EVM4.0 RoHS:否 制造商:Silicon Labs 产品: 输入/输出端数量: 工作电源电压: 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:QFN-64 封装:Tray |
| 73S8024RN | 制造商:TERIDIAN 制造商全称:TERIDIAN 功能描述:Low Cost Smart Card Interface |
| 73S8024RN-20IM/F | 功能描述:输入/输出控制器接口集成电路 Smart Card Interface ISO7816-3 & EVM4.0 RoHS:否 制造商:Silicon Labs 产品: 输入/输出端数量: 工作电源电压: 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:QFN-64 封装:Tray |
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