参数资料
型号: 7548
厂商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 单芯片8位CMOS微机
文件页数: 49/73页
文件大小: 1255K
代理商: 7548
Rev.2.00
REJ03B0210-0200
Mar 15, 2007
Page 49 of 70
7548 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Oscillation stop detection circuit
The oscillation stop detection circuit is used for reset occurrence
when a ceramic resonator or RC oscillation circuit stops by
disconnection. To use this circuit, set an on-chip oscillator to be
in active.
The oscillation stop detection circuit is in active to set “1” to the
X
IN
oscillation stop detection function active bit.
When the oscillation stop detection circuit is enabled, the
operation status of the X
IN
oscillator circuit is monitored using
the low-speed on-chip oscillator, and if oscillation stop is
detected the oscillation stop detection status bit is set to 1. If
additionally the oscillation stop detection reset enable bit is set to
“1”, an internal reset is triggered when the oscillator stops
operating.
The oscillation stop detection status bit is not initialized by an
oscillation stop detection reset and retains its value of 1. Since
the oscillation stop detection status bit is initialized to “0” by an
external reset, it is possible to determine if a reset was due to
oscillation stop detection by checking the oscillation stop
detection status bit.
The X
IN
oscillation and external clock input are set as the clocks
to detect the oscillation stop.
Refer to the electrical characteristics for the frequencies to detect
the oscillation stop.
Notes on Oscillation Stop Detection Circuit
(1) Do not execute the transition to “state 2'a” shown in Figure
66 because in this “state 2'a”, MCU is stopped without reset
even when X
IN
oscillation is stopped.
(2) X
IN
oscillation stop detection function active bit is not
cleared by the oscillation stop detection reset. Accordingly,
the oscillation stop detection circuit is in active when system
is released from internal reset cause of oscillation stop
detection.
(3) Oscillation stop detection status bit is initialized by the
following operation.
External reset, power-on reset, low voltage detection reset,
watchdog timer reset, and reset by STP instruction function
Write “0” data to the X
IN
oscillation stop detection
function active bit.
(4) The oscillation stop detection circuit is not included in the
emulator MCU “M37549RLSS”.
Fig 65. Structure of oscillation stop detection register
Fig 66. State transition of oscillation stop detection circuit
X
IN
oscillation stop detection function active bit
0: Detection function inactive
1: Detection function active
Oscillation stop detection reset enable bit
0: Oscillation stop detection reset disabled
1: Oscillation stop detection reset enabled
Oscillation stop detection status bit
0: Oscillation stop not detected
1: Oscillation stop detected
Not used (“0” at reading)
b7
Oscillation stop detection register
(CLKSTP: address 0038
16
, initial value: 00
16
)
b0
Notes on switch of clock
(1) Executing the state transition after stabilizing X
IN
oscillation.
(2) MCU cannot be returned by on-chip oscillator and its operation is stopped since internal reset does not
occur at oscillation stop detected in state 2'a. Accordingly, do not execute the transition to state 2'a.
(3) STP instruction cannot be used when oscillation stop detection circuit is in active.
(4) The same applies when the high-speed on-chip oscillator is set as
φ
SOURCE. Make sure that the low-speed
on-chip oscillator should also oscillate. When a reset occurs, the high-speed on-chip oscillator stops.
Reset state 1
X
IN
High-speed on-chip oscillator: stop
Low-speed on-chip oscillator : enabled
Oscillation stop detection reset disabled
When oscillation stop is detected;
CLKSTP
2
is set to “1”.
Internal RESET does not occur.
= 0
2
= 1
2
CLKSTP
0
= 0
2
(CLKSTP
2
is set to “0”.)
CLKSTP
0
= 1
2
(Note 1)
Oscillation stop is detected
(internal reset)
Reset state 2
X
IN
High-speed on-chip oscillator: stop
Low-speed on-chip oscillator : enabled
External reset (RESET=“L”)
Power-on reset
Low voltage detection reset
Watchdog timer reset
Reset by STP instruction function
Return from oscillation stop detection reset
CLKSTP
2
is set to “1”.
So, return from oscillation stop reset can be
confirmed.
CLKSTP
1
= 0
2
CLKSTP
1
= 0
2
(CLKSTP
2
is
set to “0”.)
CLKM
54
= 10
2
CLKM
54
= 00
2
(Note 1)
Prohibitive state
MCU stops when oscillation stops
occurs.
State 3'a
State 2'b
Oscillation stop detection reset enabled
When oscillation stop is detected;
CLKSTP
2
is set to “1”.
Internal RESET occurs.
State 3'b
Oscillation stop detection reset enabled
When oscillation stop is detected;
CLKSTP
2
is set to “1”.
Internal RESET occurs.
State 3'c
Reset
released
CLKM
54
= 10
2
CLKM
54
= 00
2
(Note 1)
CLKM
54
=10
2
CLKM
54
=00
2
(Note 1)
State 3
X
IN
oscillation
Low-speed on-chip oscillator : enabled
: enabled
State 3'
X
IN
oscillation
Low-speed on-chip oscillator : enabled
: enabled
: enabled
CLKSTP
1
CLKSTP
1
CLKSTP
1
= 1
2
State 2'
CLKSTP
1
= 1
2
: enabled
Reset
released
X
IN
oscillation
Low-speed on-chip oscillator : enabled
: enabled
X
IN
oscillation
Low-speed on-chip oscillator : enabled
: enabled
State 2
(Note 2)
(Note 2)
(Note 2)
φ
SOURCE: X
IN
φ
SOURCE: Low-speed on-chip oscillator (Note 4)
Oscillation stop detection
circuit is in active. (Note 3)
State 2'a
(
Note 2
)
Oscillation stop detection reset disabled
When oscillation stop is detected;
CLKSTP
2
is set to "1".
Internal RESET does not occur.
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