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参数资料
| 型号： | 935267488112 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, OTPROM, 20 MHz, MICROCONTROLLER, PDSO20 |
| 封装： | 7.50 MM, PLASTIC, SO-20 |
| 文件页数： | 14/69页 |
| 文件大小： | 352K |
| 代理商： | 935267488112 |
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Philips Semiconductors
Preliminary specification
87LPC768
Low power, low price, low pin count (20 pin) microcontroller with
4 kB OTP 8-bit A/D, Pulse Width Modulator
2000 May 02
19
Poll PWMCON0 to find that Transfer Bit PWMCON0.6 is “0”.
When “0”:
Write CNSW.(0:1) and CPSW.(0:4) for desired pulse widths and
counter reload values
Set PWMCON0 to Run and Transfer
Note that if a narrow pulse on the Brake Pin causes brake to be
asserted, it may not be possible to go through the above code
before the end of the pulse. In this case, in addition to the code
shown, an external latch on the Brake Pin may be required to
ensure that there is a smooth transition in going from brake to run.
The details for PWMCON1 are shown in the following table.
PWMCON1: PWM Control register 1
Addr: 0DBH
Reset Value: 00H
BIT
SYMBOL
FUNCTION
PWMCON1.7
BKCH
See table below
PWMCON1.6
BKPS
0= ”Brake” is asserted if P0.2(Brake Pin) is low.
1= ”Brake” is asserted if P0.2(Brake Pin) is high.
PWMCON1.5
BPEN
See table below.
PWMCON1.4
BKEN
0= ”Brake” is never asserted.
1= ”Brake” is enabled per table below.
PWMCON1.3
PWM3B
0= PWM3 is low, when Brake is asserted.
1= PWM3 is high, when Brake is asserted.
PWMCON1.2
PWM2B
0= PWM2 is low, when Brake is asserted.
1= PWM2 is high, when Brake is asserted.
PWMCON1.1
PWM1B
0= PWM1 is low, when Brake is asserted.
1= PWM1 is high, when Brake is asserted.
PWMCON1.0
PWM0B
0= PWM0 is low, when Brake is asserted.
1= PWM0 is high, when Brake is asserted.
7
6
54
32
10
BKCH
BKPS
BPEN
BKEN
PWM3B
PWM2B
PWM1B
PWM0B
SU01388
BPEN
0
1
BKCH
0
1
0
1
BRAKE CONDITION
Always On, (Software Brake)
On when PWM not running (Brake Pin has no effect)
On when Brake Pin asserted (PWM run has no effect)
Not Allowed
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