- 您现在的位置：买卖IC网 > PDF目录144669 > 951901AFLF (INTEGRATED DEVICE TECHNOLOGY INC) 133.34 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 PDF资料下载
参数资料
| 型号： | 951901AFLF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 133.34 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | 0.300 INCH, GREEN, MO-118, SSOP-48 |
| 文件页数： | 8/21页 |
| 文件大小： | 206K |
| 代理商： | 951901AFLF |
16
ICS951901
0670B—07/15/04
PCI_STOP# Timing Diagram
PCI_STOP# is an asynchronous input to the ICS94209. It is used to turn off the PCICLK clocks for low power operation.
PCI_STOP# is synchronized by the ICS94209 internally. The minimum that the PCICLK clocks are enabled
(PCI_STOP# high pulse) is at least 10 PCICLK clocks. PCICLK clocks are stopped in a low state and started with a
full high pulse width guaranteed. PCICLK clock on latency cycles are only one rising PCICLK clock off latency is one
PCICLK clock.
Notes:
1. All timing is referenced to the Internal CPUCLK (defined as inside the ICS94209 device.)
2. PCI_STOP# is an asynchronous input, and metastable conditions may exist. This signal is required to be synchronized
inside the ICS94209.
3. All other clocks continue to run undisturbed.
4. CPU_STOP# is shown in a high (true) state.
相关PDF资料 |
PDF描述 |
|---|---|
| 935270057551 | 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP80 |
| 935269195112 | 8 I/O, PIA-GENERAL PURPOSE, PDSO16 |
| 935270020151 | 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP48 |
| 935275617518 | 8 I/O, PIA-GENERAL PURPOSE, PDSO16 |
| 96W-NKR15HD-CW0 | SINGLE COLOR LED, RED, 7.1 mm |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 951901AFLFT | 制造商:Integrated Device Technology Inc 功能描述:Programmable PLL Frequency Generator Dual 48-Pin SSOP T/R |
| 951902 | 制造商:Weidmuller 功能描述:WPG-M25, CABLE GLAND, PA,BLA -EA - Bulk |
| 951903 | 制造商:Weidmuller 功能描述:WPG-M32, CABLE GLAND, PA,BLA -EA - Bulk |
| 951904 | 制造商:Weidmuller 功能描述:WPG-M40, CABLE GLAND, PA,BLA -EA - Bulk |
| 951905 | 制造商:Weidmuller 功能描述:WPG-M50, CABLE GLAND, PA,BLA -EA - Bulk |
发布紧急采购，3分钟左右您将得到回复。