参数资料
型号: A3P-L67201V-55
厂商: ATMEL WIRELESS MICROCONTROLLERS
元件分类: FIFO
英文描述: 512 X 9 OTHER FIFO, 55 ns, PDIP28
封装: 0.300 INCH, PLASTIC, DIP-28
文件页数: 11/16页
文件大小: 146K
代理商: A3P-L67201V-55
L 67201/L 67202
MATRA MHS
Rev. C (10/11/95)
4
stack is full, the internal write pointer is blocked from W,
so that external changes to W will have no effect on the
full FIFO stack.
Read Enable (R)
A read cycle is initiated on the falling edge of the Read
Enable (R) provided that the Empty Flag (EF) is not set.
The data is accessed on a first in/first out basis, not with
standing any current write operations. After Read Enable
(R) goes high, the Data Outputs (Q0 - Q8) will return to
a high impedance state until the next Read operation.
When all the data in the FIFO stack has been read, the
Empty Flag (EF) will go low, allowing the “final” read
cycle, but inhibiting further read operations whilst the
data outputs remain in a high impedance state. Once a
valid write operation has been completed, the Empty Flag
(EF) will go high after tWEF and a valid read may then
be initiated. When the FIFO stack is empty, the internal
read pointer is blocked from R, so that external changes
to R will have no effect on the empty FIFO stack.
First Load/Retransmit (FL/RT)
This is a dual-purpose input. In the Depth Expansion
Mode, this pin is connected to ground to indicate that it
is the first loaded (see Operating Modes). In the Single
Device Mode, this pin acts as the retransmit input. The
Single Device Mode is initiated by connecting the
Expansion In (XI) to ground.
The L 67201/202 can be made to retransmit data when the
Retransmit Enable Control (RT) input is pulsed low. A
retransmit operation will set the internal read point to the
first location and will not affect the write pointer. Read
Enable (R) and Write Enable (W) must be in the high state
during retransmit. The retransmit feature is intended for
use when a number of writes equals to or less than the
depth of the FIFO have occured since the last RS cycle.
The retransmit feature is not compatible with the Depth
Expansion Mode and will affect the Half-Full Flag (HF),
in accordance with the relative locations of the read and
write pointers.
Expansion In (XI)
This input is a dual-purpose pin. Expansion In (XI) is
connected to GND to indicate an operation in the single
device mode. Expansion In (XI) is connected to
Expansion Out (XO) of the previous device in the Depth
Expansion or Daisy Chain modes.
Full Flag (FF)
The Full Flag (FF) will go low, inhibiting further write
operations when the write pointer is one location less than
the read pointer, indicating that the device is full. If the
read pointer is not moved after Reset (RS), the Full Flag
(FF) will go low after 512/1024 writes.
Empty Flag (EF)
The Empty Flag (EF) will go low, inhibiting further read
operations when the read pointer is equal to the write
pointer, indicating that the device is empty.
Expansion Out/Half-full Flag (XO/HF)
This is a dual-purpose output. In the single device mode,
when Expansion In (XI) is connected to ground, this
output acts as an indication of a half-full memory.
After half the memory is filled and on the falling edge of
the next write operation, the Half-Full Flag (HF) will be
set to low and will remain set until the difference between
the write and read pointers is less than or equal to half of
the total memory of the device. The Half-Full Flag (HF)
is then reset by the rising edge of the read operation.
In the Depth Expansion Mode, Expansion In (XI) is
connected to Expansion Out (XO) of the previous device.
This output acts as a signal to the next device in the Daisy
Chain by providing a pulse to the next device when the
previous device reaches the last memory location.
Data Output (Q0 - Q8)
DATA output for 9-bit wide data. This data is in a high
impedance condition whenever Read (R) is in a high state.
相关PDF资料
PDF描述
A3P-L67202L-65 1K X 9 OTHER FIFO, 65 ns, PDIP28
ASI-L67201L-60 512 X 9 OTHER FIFO, 60 ns, PQCC32
ATIR0721DS POSITION, LINEAR SENSOR-DIFFUSE, 1-1mm, 3mA, RECTANGULAR, SURFACE MOUNT
ATIR0821DS POSITION, LINEAR SENSOR-DIFFUSE, 1-1mm, 3mA, RECTANGULAR, THROUGH HOLE MOUNT
ATL80/25-256VM FPGA, 15600 GATES
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