- 您现在的位置：买卖IC网 > PDF目录166373 > A3P-L67201V-55 (ATMEL WIRELESS MICROCONTROLLERS) 512 X 9 OTHER FIFO, 55 ns, PDIP28 PDF资料下载
参数资料
| 型号： | A3P-L67201V-55 |
| 厂商： | ATMEL WIRELESS MICROCONTROLLERS |
| 元件分类： | FIFO |
| 英文描述： | 512 X 9 OTHER FIFO, 55 ns, PDIP28 |
| 封装： | 0.300 INCH, PLASTIC, DIP-28 |
| 文件页数： | 14/16页 |
| 文件大小： | 146K |
| 代理商： | A3P-L67201V-55 |
L 67201/L 67202
MATRA MHS
Rev. C (10/11/95)
7
single word to be read after one word has been written to
an empty FIFO stack. The data is enabled on the bus at
(tWEF + tA) ns after the leading edge of W which is
known as the first write edge and remains on the bus until
the R line is raised from low to high, after which the bus
will go into a three-state mode after tRHZ ns. The EF line
will show a pulse indicating temporary reset and then will
be set. In the interval in which R is low, more words may
be written to the FIFO stack (the subsequent writes after
the first write edge will reset the Empty Flag) ; however,
the same word (written on the first write edge) presented
to the output bus as the read pointer will not be
incremented if R is low. On toggling R, the remaining
words written to the FIFO will appear on the output bus
in accordance with the read cycle timings.
In the write flow-through mode (figure 18), the FIFO
stack allows a single word of data to be written
immediately after a single word of data has been read
from a full FIFO stack. The R line causes the FF to be
reset, but the W line, being low, causes it to be set again
in anticipation of a new data word. The new word is
loaded into the FIFO stack on the leading edge of W. The
W line must be toggled when FF is not set in order to write
new data into the FIFO stack and to increment the write
pointer.
Figure 4. Block Diagram of 1536
× 9 / 3072 × 9 FIFO Memory (Depth expansion).
W
6
9
FF
9
FF
9
FF
9
RS
FULL
XO
EF
FL
EF
FL
EF
FL
XI
EMPTY
9
R
VCC
Q
L
67201/202
L
67201/202
L
67201/202
Figure 5. Compound FIFO Expansion.
L 67201/202
DEPTH
EXPANSION
BLOCK
L 67201/202
DEPTH
EXPANSION
BLOCK
L 67201/202
DEPTH
EXPANSION
BLOCK
R . W . RS
Q0 – Q8
Q9 – Q17
Q(N–8) – QN
I(N–8) – IN
I9 – I17
I0 – I8
I9 – I17
I0 – I8
Notes : 6. For depth expansion block see section on Depth Expansion and Figure 4.
7. For Flag detection see section on Width Expansion and Figure 3.
相关PDF资料 |
PDF描述 |
|---|---|
| A3P-L67202L-65 | 1K X 9 OTHER FIFO, 65 ns, PDIP28 |
| ASI-L67201L-60 | 512 X 9 OTHER FIFO, 60 ns, PQCC32 |
| ATIR0721DS | POSITION, LINEAR SENSOR-DIFFUSE, 1-1mm, 3mA, RECTANGULAR, SURFACE MOUNT |
| ATIR0821DS | POSITION, LINEAR SENSOR-DIFFUSE, 1-1mm, 3mA, RECTANGULAR, THROUGH HOLE MOUNT |
| ATL80/25-256VM | FPGA, 15600 GATES |
相关代理商/技术参数 |
参数描述 |
|---|---|
| A3PMGB1Y14ASP2 | 制造商:APEM 功能描述:16mm Industrial Control |
| A3PMIS | 制造商:Pentair Technical Products / Hoffman 功能描述:3R Pad Mound Insect Screen , , Steel 制造商:PENTAIR TECNICAL PRODCUTS 功能描述:3R Pad Mound Insect Screen |
| A3PN010-1QNG48 | 功能描述:IC FPGA NANO 10K GATES 48-QFN RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASIC3 nano 标准包装:152 系列:IGLOO PLUS LAB/CLB数:- 逻辑元件/单元数:792 RAM 位总计:- 输入/输出数:120 门数:30000 电源电压:1.14 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 85°C 封装/外壳:289-TFBGA，CSBGA 供应商设备封装:289-CSP（14x14） |
| A3PN010-1QNG48I | 功能描述:IC FPGA NANO 10K GATES 48-QFN RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASIC3 nano 标准包装:152 系列:IGLOO PLUS LAB/CLB数:- 逻辑元件/单元数:792 RAM 位总计:- 输入/输出数:120 门数:30000 电源电压:1.14 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 85°C 封装/外壳:289-TFBGA，CSBGA 供应商设备封装:289-CSP（14x14） |
| A3PN010-2QNG48 | 功能描述:IC FPGA NANO 10K GATES 48-QFN RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASIC3 nano 标准包装:152 系列:IGLOO PLUS LAB/CLB数:- 逻辑元件/单元数:792 RAM 位总计:- 输入/输出数:120 门数:30000 电源电压:1.14 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 85°C 封装/外壳:289-TFBGA，CSBGA 供应商设备封装:289-CSP（14x14） |
发布紧急采购，3分钟左右您将得到回复。