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| 型号： | A4940KLPTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 10/14页 |
| 文件大小： | 0K |
| 描述： | IC MOSF DVR FULL BRIDGE 24TSSOP |
| 标准包装： | 1 |
| 配置： | 半桥 |
| 输入类型： | 非反相 |
| 延迟时间： | 35ns |
| 配置数： | 1 |
| 输出数： | 4 |
| 电源电压： | 5.5 V ~ 50 V |
| 工作温度： | -40°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 供应商设备封装： | 24-TSSOP 裸露焊盘 |
| 包装： | 标准包装 |
| 产品目录页面： | 1141 (CN2011-ZH PDF) |
| 其它名称： | 620-1319-6 |
A4940
Bootstrap Capacitor Selection
Automotive Full Bridge MOSFET Driver
during the charge transfer, which should be 400 mV or less.
The bootstrap capacitors, CBOOTx, must be correctly selected
to ensure proper operation of the A4940. If the capacitances are
too high, time will be wasted charging the capacitor, resulting in
a limit on the maximum duty cycle and the PWM frequency. If
the capacitances are too low, there can be a large voltage drop at
the time the charge is transferred from CBOOTx to the MOSFET
gate, due to charge sharing.
To keep this voltage drop small, the charge in the bootstrap
capacitor, Q BOOT , should be much larger than the charge required
by the gate of the MOSFET, Q GATE . A factor of 20 is a reason-
able value, and the following formula can be used to calculate the
value for C BOOT :
Q BOOT = C BOOT V BOOT
The capacitor is charged whenever the Sx pin is pulled low and
current flows from VREG through the internal bootstrap diode
circuit to CBOOT.
Bootstrap Charge Management
The A4940 provides automatic bootstrap capacitor charge
management. The bootstrap capacitor voltage for each phase
is continuously checked to ensure that it is above the bootstrap
under-voltage threshold, V BOOTUV . If the bootstrap capacitor
voltage drops below this threshold, when the corresponding
high-side is active, the A4940 will turn on the necessary low-side
MOSFET, and continue charging until the bootstrap capacitor
exceeds the undervoltage threshold plus the hysteresis, V BOOTUV
+ V BOOTUVHYS .
V BOOT
= Q GATE
Q GATE
C BOOT =
20
20
If the bootstrap capacitor voltage is below the threshold, when the
corresponding high-side is commanded to turn on, the A4940 will
not attempt to turn on the high-side MOSFET, but will turn on the
necessary low-side MOSFET to charge the bootstrap capacitor
where V BOOT is the voltage across the bootstrap capacitor.
The voltage drop across the bootstrap capacitor as the MOSFET
is being turned on, Δ V, can be approximated by:
until it exceeds the undervoltage threshold plus the hysteresis.
The minimum charge time is typically 7 μ s, but may be longer
for very large values of bootstrap capacitor (>1000 nF). If the
bootstrap capacitor voltage does not reach the threshold within
? V ≈
Q GATE
C BOOT
approximately 200 μ s, an undervoltage fault will be flagged.
VREG Capacitor Selection
So for a factor of 20, Δ V would be approximately 5% of V BOOT .
The maximum voltage across the bootstrap capacitor under
normal operating conditions is V REG (max). In most applications,
with a good ceramic capacitor the working voltage can be limited
to 16 V.
Bootstrap Charging
It is good practice to ensure the high side bootstrap capacitor is
completely charged before a high side PWM cycle is requested.
The time required to charge the capacitor, t CHARGE ( μ s), is
approximated by:
The internal reference, V REG , supplies current for the low-side
gate drive circuits and the charging current for the bootstrap
capacitors. When a low-side MOSFET is turned on, the gate-
drive circuit will provide the high transient current to the gate that
is necessary to turn on the MOSFET quickly. This current, which
can be several hundred milliamperes, cannot be provided directly
by the limited output of the VREG regulator, and must be sup-
plied by an external capacitor connected to the VREG pin.
The turn-on current for the high-side MOSFET is similar in value
to that for the low-side MOSFET, but is mainly supplied by the
bootstrap capacitor. However the bootstrap capacitor must then
t CHARGE ≈
C BOOT
100
? V
be recharged from the VREG regulator output. Unfortunately the
bootstrap recharge can occur a very short time after the low-side
turn-on occurs. This requires that the value of the capacitor con-
where C BOOT is the value of the bootstrap capacitor, in nF, and
Δ V is the required voltage of the bootstrap capacitor.
At power-up and when the drives have been disabled for a long
time, the bootstrap capacitor can be completely discharged. In
this case Δ V can be considered to be the full high-side drive
voltage, 12 V. Otherwise, Δ V is the amount of voltage dropped
nected between VREG and AGND should be high enough to min-
imize the transient voltage drop on VREG for the combination of
a low-side MOSFET turn-on and a bootstrap capacitor recharge.
A value of 20 × C BOOT is a reasonable value. The maximum
working voltage will never exceed V REG , so the capacitor can be
rated as low as 15 V. This capacitor should be placed as close as
possible to the VREG pin.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
10
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