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参数资料
| 型号： | A4940KLPTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 4/14页 |
| 文件大小： | 0K |
| 描述： | IC MOSF DVR FULL BRIDGE 24TSSOP |
| 标准包装： | 1 |
| 配置： | 半桥 |
| 输入类型： | 非反相 |
| 延迟时间： | 35ns |
| 配置数： | 1 |
| 输出数： | 4 |
| 电源电压： | 5.5 V ~ 50 V |
| 工作温度： | -40°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 供应商设备封装： | 24-TSSOP 裸露焊盘 |
| 包装： | 标准包装 |
| 产品目录页面： | 1141 (CN2011-ZH PDF) |
| 其它名称： | 620-1319-6 |
A4940
Automotive Full Bridge MOSFET Driver
ELECTRICAL CHARACTERISTICS Valid at T J = –40°C to 150°C, V BB = 7 to 50 V, V DD = 3 to 5.5 V; unless otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Supply and Reference
V BB Functional Operating Range 1
V DD Range
V BB
V DD
5.5
3
–
–
50
5.5
V
V
V BB Quiescent Current
V DD Quiescent Current
VREG Output Voltage
Bootstrap Diode Forward Voltage
Bootstrap Diode Resistance
Bootstrap Diode Current Limit
I BBQ
I BBS
I VDDQ
I VDDS
V REG
V fBOOT
r D
I DBOOT
RESET = high, GHx, GLx = low, V BB = 12 V
RESET= low, V BB = 12 V
RESET = high, outputs low
RESET = low
V BB > 9 V, I REG = 0 to 8 mA
7.5 V < V BB ≤ 9 V, I REG = 0 to 6 mA
6 V < V BB ≤ 7.5 V, I REG = 0 to 5 mA
5.5 V < V BB ≤ 6 V, I REG < 4 mA
I D = 10 mA
I D = 100 mA
r D(100mA) =
(V fBOOT(150mA) – V fBOOT(50mA) ) / 100 mA
–
–
–
–
12.65
12.65
2 × V BB
– 2.5
8.5
0.4
1.5
6
250
1
–
2
–
13
13
–
9.5
0.7
2.2
10
500
2
10
4
10
13.9
13.9
–
–
1.0
2.8
20
750
mA
μ A
mA
μ A
V
V
V
V
V
V
Ω
mA
Gate Output Drive
Turn-On Time
Turn-Off Time
Pull-up On Resistance
Pull-down On Resistance
GHx Output Voltage
GLx Output Voltage
Turn-Off Propagation Delay 2
Turn-On Propagation Delay 2
Propagation Delay Matching - Phase to
Phase
Propagation Delay Matching - On to Off
Dead Time 2
t r
t f
R DS(on)UP
R DS(on)DN
V GH
V GL
t p(off)
t p(on)
Δ t PP
Δ t OO
t DEAD
C LOAD = 1 nF, 20% to 80% points
C LOAD = 1 nF, 80% to 20% points
T J = 25°C, I GHX = –150 mA
T J = 150°C, I GHX = –150 mA
T J = 25°C, I GLX = –150 mA
T J = 150°C, I GLX = –150 mA
Bootstrap capacitor fully charged
Input change to unloaded gate output change
Input change to unloaded gate output change
Same phase change
Single phase
RDEAD tied to GND
R DEAD = 3 k Ω
R DEAD = 30 k Ω
R DEAD = 240 k Ω
RDEAD tied to VDD
–
–
8
13
3
6
V CX – 0.2
V REG – 0.2
60
60
–
–
–
–
815
–
–
35
20
11
18.5
6
9
–
–
90
90
10
10
0
180
960
3.5
6
–
–
16
24
8
12
–
–
150
150
–
–
–
–
1150
–
–
ns
ns
Ω
Ω
Ω
Ω
V
V
ns
ns
ns
ns
ns
ns
ns
μ s
μ s
Continued on the next page…
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
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