参数资料
型号: AD5363BCPZ
厂商: Analog Devices Inc
文件页数: 8/29页
文件大小: 0K
描述: IC DAC 14BIT 8CH SERIAL 56-LFCSP
产品培训模块: Data Converter Fundamentals
DAC Architectures
标准包装: 1
设置时间: 20µs
位数: 14
数据接口: 串行
转换器数目: 8
电压电源: 双 ±
功率耗散(最大): 209mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 56-VFQFN 裸露焊盘,CSP
供应商设备封装: 56-LFCSP-VQ(8x8)
包装: 托盘
输出数目和类型: 8 电压,单极;8 电压,双极
采样率(每秒): *
配用: EVAL-AD5363EBZ-ND - BOARD EVALUATION FOR AD5363
AD5362/AD5363
Rev. A | Page 15 of
28
TERMINOLOGY
Integral Nonlinearity (INL)
Integral nonlinearity, or endpoint linearity, is a measure of
the maximum deviation from a straight line passing through
the endpoints of the DAC transfer function. It is measured
after adjusting for zero-scale error and full-scale error and is
expressed in least significant bits (LSB).
Differential Nonlinearity (DNL)
Differential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of 1 LSB maximum
ensures monotonicity.
Zero-Scale Error
Zero-scale error is the error in the DAC output voltage when
all 0s are loaded into the DAC register. Zero-scale error is a
measure of the difference between VOUT (actual) and VOUT
(ideal), expressed in millivolts, when the channel is at its mini-
mum value. Zero-scale error is mainly due to offsets in the
output amplifier.
Full-Scale Error
Full-scale error is the error in the DAC output voltage when
all 1s are loaded into the DAC register. Full-scale error is a
measure of the difference between VOUT (actual) and VOUT
(ideal), expressed in millivolts, when the channel is at its maxi-
mum value. Full-scale error does not include zero-scale error.
Gain Error
Gain error is the difference between full-scale error and
zero-scale error. It is expressed as a percentage of the full-
scale range (FSR).
Gain Error = Full-Scale Error Zero-Scale Error
VOUT Temperature Coefficient
The VOUT temperature coefficient includes output error
contributions from linearity, offset, and gain drift.
DC Output Impedance
DC output impedance is the effective output source resistance.
It is dominated by package lead resistance.
DC Crosstalk
The DAC outputs are buffered by op amps that share common
VDD and VSS power supplies. If the dc load current changes in
one channel (due to an update), this change can result in a
further dc change in one or more channel outputs. This effect is
more significant at high load currents and is reduced as the load
currents are reduced. With high impedance loads, the effect is
virtually immeasurable. Multiple VDD and VSS terminals are
provided to minimize dc crosstalk.
Output Voltage Settling Time
Output voltage settling time is the amount of time it takes for
the output of a DAC to settle to a specified level for a full-scale
input change.
Digital-to-Analog Glitch Energy
Digital-to-analog glitch energy is the amount of energy that is
injected into the analog output at the major code transition. It is
specified as the area of the glitch in nV-s. It is measured by
toggling the DAC register data between 0x7FFF and 0x8000
(AD5362) or 0x1FFF and 0x2000 (AD5363).
Channel-to-Channel Isolation
Channel-to-channel isolation refers to the proportion of input
signal from one DAC reference input that appears at the output
of another DAC operating from another reference. It is
expressed in decibels and measured at midscale.
DAC-to-DAC Crosstalk
DAC-to-DAC crosstalk is the glitch impulse that appears at
the output of one converter due to both the digital change
and subsequent analog output change at another converter.
It is specified in nV-s.
Digital Crosstalk
Digital crosstalk is defined as the glitch impulse transferred to
the output of one converter due to a change in the DAC register
code of another converter. It is specified in nV-s.
Digital Feedthrough
When the device is not selected, high frequency logic activity
on the digital inputs of the device can be capacitively coupled
both across and through the device to appear as noise on the
VOUT pins. It can also be coupled along the supply and ground
lines. This noise is digital feedthrough.
Output Noise Spectral Density
Output noise spectral density is a measure of internally
generated random noise. Random noise is characterized as a
spectral density (voltage per √Hz). It is measured by loading
all DACs to midscale and measuring noise at the output. It is
measured in nV/√Hz.
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AD5363BCPZ-REEL7 功能描述:IC DAC 14BIT 8CH SERIAL 56-LFCSP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Data Converter Fundamentals DAC Architectures 标准包装:750 系列:- 设置时间:7µs 位数:16 数据接口:并联 转换器数目:1 电压电源:双 ± 功率耗散(最大):100mW 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-LCC(J 形引线) 供应商设备封装:28-PLCC(11.51x11.51) 包装:带卷 (TR) 输出数目和类型:1 电压,单极;1 电压,双极 采样率(每秒):143k
AD5363BSTZ 功能描述:IC DAC 14BIT 8CH SERIAL 52-LQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Data Converter Fundamentals DAC Architectures 标准包装:750 系列:- 设置时间:7µs 位数:16 数据接口:并联 转换器数目:1 电压电源:双 ± 功率耗散(最大):100mW 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-LCC(J 形引线) 供应商设备封装:28-PLCC(11.51x11.51) 包装:带卷 (TR) 输出数目和类型:1 电压,单极;1 电压,双极 采样率(每秒):143k
AD5363BSTZ-REEL 功能描述:IC DAC 14BIT 8CH SERIAL 52-LQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Data Converter Fundamentals DAC Architectures 标准包装:750 系列:- 设置时间:7µs 位数:16 数据接口:并联 转换器数目:1 电压电源:双 ± 功率耗散(最大):100mW 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-LCC(J 形引线) 供应商设备封装:28-PLCC(11.51x11.51) 包装:带卷 (TR) 输出数目和类型:1 电压,单极;1 电压,双极 采样率(每秒):143k
AD5365D/BIN/883B 制造商:Analog Devices 功能描述:- Rail/Tube
AD536A 制造商:AD 制造商全称:Analog Devices 功能描述:Integrated Circuit True RMS-to-DC Converter