参数资料
| 型号： | AD5755-1ACPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 33/52页 |
| 文件大小： | 0K |
| 描述： | IC DAC 16BIT SERIAL 64LFCSP |
| 视频文件： | AD5755: 16-Bit Multi-Channel, Voltage and Current Output DAC |
| 特色产品： | AD5755 / AD5755-1 / AD5757 DACs |
| 标准包装： | 1 |
| 设置时间： | 11µs |
| 位数： | 16 |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 4 |
| 电压电源： | 模拟和数字，双 ± |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 64-LFCSP-VQ（9x9） |
| 包装： | 托盘 |
| 输出数目和类型： | 4 电流，4 电压 |
| 采样率（每秒）： | * |
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Data Sheet
AD5755-1
Rev. E | Page 39 of 52
Status Register
The status register is a read only register. This register contains
any fault information as a well as a ramp active bit and a user
toggle bit. When the STATREAD bit in the main control
register is set, the status register contents can be read back on
the SDO pin during every write sequence. Alternatively, if the
STATREAD bit is not set, the status register can be read using
the normal readback operation.
Table 29. Decoding the Status Register
MSB
LSB
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DC-
DCD
DC-
DCC
DC-
DCB
DC-
DCA
User
toggle
PEC
error
Ramp
active
Over
TEMP
VOUT_D
fault
VOUT_C
fault
VOUT_B
fault
VOUT_A
fault
IOUT_D
fault
IOUT_C
fault
IOUT_B
fault
IOUT_A
fault
Table 30. Status Register Options
Bit
Description
DC-DCD
In current output mode, this bit is set on Channel D if the dc-to-dc converter cannot maintain compliance (it may be
reaching its V
MAX voltage). In this case, the IOUT_D fault bit is also set. See the DC-to-DC Converter VMAX Functionality section
for more information on this bit’s operation under this condition.
In voltage output mode, this bit is set if, on Channel D, the dc-to-dc converter is unable to regulate to 15 V as expected.
When this bit is set, it does not result in the FAULT pin going high.
DC-DCC
In current output mode, this bit is set on Channel C if the dc-to-dc converter cannot maintain compliance (it may be
reaching its V
MAX voltage). In this case, the IOUT_C fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for
more information on this bit’s operation under this condition.
In voltage output mode, this bit is set if, on Channel C, the dc-to-dc converter is unable to regulate to 15 V as expected.
When this bit is set, it does not result in the FAULT pin going high.
DC-DCB
In current output mode, this bit is set on Channel B if the dc-to-dc converter cannot maintain compliance (it may be
reaching its V
MAX voltage). In this case, the IOUT_B fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for
more information on this bit’s operation under this condition.
In voltage output mode, this bit is set if, on Channel B, the dc-to-dc converter is unable to regulate to 15 V as expected.
When this bit is set, it does not result in the FAULT pin going high.
DC-DCA
In current output mode, this bit is set on Channel A if the dc-to-dc converter cannot maintain compliance (it may be
reaching its V
MAX voltage). In this case, the IOUT_A fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for
more information on this bit’s operation under this condition.
In voltage output mode, this bit is set if, on Channel A, the dc-to-dc converter is unable to regulate to 15 V as expected.
When this bit is set, it does not result in the FAULT pin going high.
User Toggle
User toggle bit. This bit is set or cleared via the software register. This can be used to verify data communications if needed.
PEC Error
Denotes a PEC error on the last data-word received over the SPI interface.
Ramp Active
This bit is set while any one of the output channels is slewing (slew rate control is enabled on at least one channel).
Over TEMP
This bit is set if the AD5755-1 core temperature exceeds approximately 150°C.
V
OUT_D Fault
This bit is set if a fault is detected on the V
OUT_D pin.
V
OUT_C Fault
This bit is set if a fault is detected on the V
OUT_C pin.
V
OUT_B Fault
This bit is set if a fault is detected on the V
OUT_B pin.
V
OUT_A Fault
This bit is set if a fault is detected on the V
OUT_A pin.
I
OUT_D Fault
This bit is set if a fault is detected on the I
OUT_D pin.
I
OUT_C Fault
This bit is set if a fault is detected on the I
OUT_C pin.
I
OUT_B Fault
This bit is set if a fault is detected on the I
OUT_B pin.
I
OUT_A Fault
This bit is set if a fault is detected on the I
OUT_A pin.
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