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参数资料
| 型号： | AD5764CSUZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 15/28页 |
| 文件大小： | 0K |
| 描述： | IC DAC 16BIT QUAD BIPO 32-TQFP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 产品变化通告： | AD5764(R), AD5744R Product Change 04/Sept/2009 |
| 设计资源： | High Accuracy, Bipolar Voltage Output Digital-to-Analog Conversion Using AD5764 (CN0006) |
| 标准包装： | 500 |
| 设置时间： | 8µs |
| 位数： | 16 |
| 数据接口： | 串行 |
| 转换器数目： | 4 |
| 电压电源： | 双 ± |
| 功率耗散（最大）： | 275 mW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-TQFP |
| 供应商设备封装： | 32-TQFP（7x7） |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 4 电压，双极 |
| 采样率（每秒）： | 1.26M |
| 配用： | EVAL-AD5764EBZ-ND - BOARD EVAL FOR AD5764 |
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AD5764
Data Sheet
Rev. F | Page 22 of 28
FINE GAIN REGISTER
The fine gain register is addressed by setting the three REG bits
to 100. The DAC address bits select with which DAC channel
the data transfer is to take place (see Table 10). The fine gain
register is a 6-bit register and allows the user to adjust the gain
of each DAC channel by 32 LSBs to +31 LSBs in 1 LSB
is made to both the positive full-scale points and the negative
full-scale points simultaneously, each point being adjusted by
of one step. The fine gain register coding is twos complement.
OFFSET REGISTER
The offset register is addressed by setting the three REG bits to
101. The DAC address bits select with which DAC channel the
data transfer is to take place (see Table 10). The AD5764 offset
register is an 8-bit register and allows the user to adjust the offset
of each channel by 16 LSBs to +15.875 LSBs in increments of
coding is twos complement.
Table 16. Programming the Fine Gain Register Bit Map
REG2
REG1
REG0
A2
A1
A0
DB15:DB6
DB5
DB4
DB3
DB2
DB1
DB0
1
0
DAC address
Don’t care
FG5
FG4
FG3
FG2
FG1
FG0
Table 17. Fine Gain Register Options
Gain Adjustment
FG5
FG4
FG3
FG2
FG1
FG0
+31 LSBs
0
1
+30 LSBs
0
1
0
…
+2 LSBs
0
1
0
+1 LSB
0
1
No Adjustment (Default)
0
1 LSB
1
2 LSBs
1
0
…
31 LSBs
1
0
1
32 LSBs
1
0
Table 18. Programming the Offset Register Bit Map
REG2
REG1
REG0
A2
A1
A0
DB15:DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
1
0
1
DAC address
Don’t care
OF7
OF6
OF5
OF4
OF3
OF2
OF1
OF0
Table 19. AD5764 Offset Register Options
Offset Adjustment
OF7
OF6
OF5
OF4
OF3
OF2
OF1
OF0
+15.875 LSBs
0
1
+15.75 LSBs
0
1
0
…
+0.25 LSBs
0
1
0
+0.125 LSBs
0
1
No Adjustment (Default)
0
0.125 LSBs
1
0.25 LSBs
1
0
…
15.875 LSBs
1
0
1
16 LSBs
1
0
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| AD5764RBSUZ | 功能描述:IC DAC 16BIT QUAD VOUT 32-TQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1,000 系列:- 设置时间:1µs 位数:8 数据接口:串行 转换器数目:8 电压电源:双 ± 功率耗散（最大）:941mW 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC W 包装:带卷 (TR) 输出数目和类型:8 电压，单极 采样率（每秒）:* |
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