参数资料
型号: AD5764CSUZ-REEL7
厂商: Analog Devices Inc
文件页数: 7/28页
文件大小: 0K
描述: IC DAC 16BIT QUAD BIPO 32-TQFP
产品培训模块: Data Converter Fundamentals
DAC Architectures
产品变化通告: AD5764(R), AD5744R Product Change 04/Sept/2009
设计资源: High Accuracy, Bipolar Voltage Output Digital-to-Analog Conversion Using AD5764 (CN0006)
标准包装: 500
设置时间: 8µs
位数: 16
数据接口: 串行
转换器数目: 4
电压电源: 双 ±
功率耗散(最大): 275 mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-TQFP
供应商设备封装: 32-TQFP(7x7)
包装: 带卷 (TR)
输出数目和类型: 4 电压,双极
采样率(每秒): 1.26M
配用: EVAL-AD5764EBZ-ND - BOARD EVAL FOR AD5764
Data Sheet
AD5764
Rev. F | Page 15 of 28
7000
3000
4000
5000
6000
2000
–1000
0
1000
–10
10
5
0
–5
O
UT
P
UT
V
O
L
T
AG
E
DE
L
T
A
(
V
)
SOURCE/SINK CURRENT (mA)
05
30
3-
0
42
AVDD/AVSS = ±15V
AVDD/AVSS = ±12V
TA = 25°C
VREFIN = 5V
RISCC = 6k
Figure 25. Source and Sink Capability of Output Amplifier with
Positive Full Scale Loaded
10000
7000
8000
9000
3000
4000
5000
6000
2000
–1000
0
1000
–12
8
3
–2
–7
O
UT
P
UT
V
O
L
T
AG
E
DE
L
T
A
(
V
)
SOURCE/SINK CURRENT (mA)
05
30
3-
0
43
15V SUPPLIES
12V SUPPLIES
TA = 25°C
VREFIN = 5V
RISCC = 6k
Figure 26. Source and Sink Capability of Output Amplifier with
Negative Full Scale Loaded
05
30
3-
04
4
CH1 3.00V
M1.00s
CH1
–120mV
1
AVDD/AVSS = ±15V
TA = 25°C
VREFIN = 5V
1s/DIV
Figure 27. Full-Scale Settling Time
–4
–6
–8
–10
–12
–14
–16
–18
–20
–22
–24
–26
–2.0–1.5–1.0–0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
V
OU
T
(m
V)
TIME (s)
05
30
3-
0
47
AVDD/AVSS = ±12V
VREFIN = 5V
TA = 25°C
0x8000 TO 0x7FFF
500ns/DIV
Figure 28. Major Code Transition Glitch Energy, AVDD/AVSS = ±12 V
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