参数资料
| 型号： | AD7280AWBSTZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 24/48页 |
| 文件大小： | 0K |
| 描述： | IC BATT MON LI-ION AUTO 48LQFP |
| 标准包装： | 1 |
| 功能： | 电池监控器，过压/欠压保护 |
| 电池化学： | 锂离子（Li-Ion） |
| 电源电压： | 8 V ~ 30 V |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 托盘 |
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AD7280A
POWER-DOWN
V DD
The AD7280A provides two power-down options.
0.1μF
10μF
10k ?
?
?
Full power-down (hardware)
Software power-down
V DD MASTER
V REG
1μF
Full Power-Down (Hardware)
The AD7280A can be placed into full power-down mode, which
requires only 5 μA maximum current, by taking the PD pin low.
The falling edge of the PD pin powers down all analog and
digital circuitry.
The AD7280A includes a digital delay filter on the PD pin,
MUST GO TO 0V
IN HARDWARE
POWER-DOWN
DV CC
AV CC
V DRIVE
AD7280A
V REF
C REF
0.1μF
0.1μF
1μF
0.1μF
which protects against a power-down being initiated by noise
or glitches on the hardware PD pin. A hardware power-down
is not initiated until the PD pin is held low for approximately
130 μs. Similarly, the AD7280A is not taken out of power-down
mode until the PD pin is held high for approximately 130 μs.
The digital delay filter does not apply on initial power-up. The
AUX TERM
AUX6
AUX5
AUX4
AUX3
AUX2
AUX1
V SS
ALERT
SDO
SDI
SCLK
CS
PD
CNVST
DSP/MICRO-
PROCESSOR
power-on request is accepted by the AD7280A approximately
5 μs after the rising edge of PD.
When placing the AD7280A into full power-down mode, AV CC
and DV CC must fall to 0 V and must not be held high by any
external means. AV CC and DV CC can be held high unintention-
V DD
MUST GO TO 0V IN
HARDWARE POWER-DOWN
Figure 37. V DRIVE Powered from V REG
ally if the auxiliary ADC inputs are greater than the forward
0.1μF
10μF
10k ?
bias on the internal ESD protection diodes. For this reason, it
is recommended that the auxiliary ADC inputs return to 0 V
when the part is placed in full power-down mode.
In addition, all digital inputs on the AD7280A master device
must return to 0 V when the part is placed in full power-down
mode (see Figure 37). However, if an external V DRIVE supply is
used—that is, V DRIVE is not connected to V REG —then only the
V DD MASTER V REG
DV CC
AV CC
AD7280A
V DRIVE
1μF
0.1μF
0.1μF
2.7V TO 5.5V SUPPLY
0.1μF 10μF
CNVST line must return low (see Figure 38 ).
When the AD7280A is placed into full power-down mode, the
device must be left in full power-down for a minimum of 2 ms
when the V REG and V REF pins are decoupled with 1 μF capacitors.
This ensures that the charge on the V REG and V REF decoupling
capacitors dissipates sufficiently to allow the internal power-on
reset circuit to activate when powering the AD7280A back up.
This time is measured from the falling edge of the PD pin.
as the AD7280A is powering down with 1 μF decoupling
MUST GO TO 0V
IN HARDWARE
POWER-DOWN
AUX TERM
AUX6
AUX5
AUX4
AUX3
AUX2
AUX1
V SS
V REF
C REF
ALERT
SDO
SDI
SCLK
CS
PD
CNVST
1μF
0.1μF
DSP/MICRO-
PROCESSOR
MUST GO TO 0V IN
HARDWARE POWER-DOWN
capacitors on the pins. Figure 20 shows a similar plot but with
10 μF decoupling capacitors on the V REG and V REF pins.
Rev. 0 | Page 24 of 48
Figure 38. V DRIVE Powered from DSP/Microprocessor
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD7280AWBSTZ-RL | 功能描述:IC BATT MON LI-ION AUTO 48LQFP RoHS:是 类别:集成电路 (IC) >> PMIC - 电池管理 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 功能:电池监控器 电池化学:碱性，锂离子，镍镉，镍金属氢化物 电源电压:1 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 供应商设备封装:SOT-6 包装:带卷 (TR) |
| AD7280BSTZ | 制造商:Analog Devices 功能描述: |
| AD7280BSTZ-RL | 制造商:Analog Devices 功能描述: |
| AD7280BSTZ-U6 | 制造商:Analog Devices 功能描述: |
| AD7280S-OB | 制造商:Sony Nec Optiarc America 功能描述:24X DVDRW SATA (BLACK) - Bulk |
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