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参数资料
| 型号： | AD73311 |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | Low Cost, Low Power CMOS General Purpose Analog Front End Processor(低成本、低功耗、CMOS通用模拟前端处理器) |
| 中文描述： | 低成本，低功耗CMOS通用模拟前端处理器（低成本，低功耗，的CMOS通用模拟前端处理器） |
| 文件页数： | 23/36页 |
| 文件大小： | 290K |
| 代理商： | AD73311 |
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AD73311
–23–
REV. A
In order to produce a direct sampling rate of 8 kHz, it is
necessary to reduce the external master clock to 8.192 MHz and
to set the master clock divider to a ratio of 4, which results in a
sample rate of 8 kHz. In this case, the response of the Sinc
3
decimation filter may affect the response in the voice BW as its
first null occurs at 8 kHz. In Figure 17, Trace A shows how the
SNR remains approximately constant up to F
S
/2 regardless of
the sample rate F
S
; Trace B shows that the SNR achievable in
the voice BW is proportional to the sampling rate F
S
. These two
traces intersect at an F
S
of 8 kHz which is the point where F
S
/2
equals the voice BW.
SAMPLING FREQUENCY (DMCLK/256) – kHz
8
16
24
32
40
48
56
64
80
70
S
65
55
75
60
SNR IN VOICEBAND
(300Hz–3400Hz)
SNR IN BAND UP TO F
S
/2
TRACE B
TRACE A
Figure 17. SNR vs. Sampling Frequency
If the input signal is externally band-limited, it is possible to
achieve the 8 kHz sampling rate directly from the 64 kHz
sample rate by decimating the sampled data in the DSP. This
technique will alias the band between 8 kHz and 64 kHz into
the 8 kHz band, therefore it is necessary to have good quality
external band-limiting on the input signal. Figure 18 shows the
spectral response of using this decimation technique for sample
rate reduction.
FREQUENCY – kHz
0
–1200
4.0
0.5
d
1.0
1.5
2.0
2.5
3.0
3.5
–20
–60
–80
–100
–40
S/N+D = 59.545
Figure 18. FFT (ADC 8 kHz Subsampled)
Encoder Group Delay
The AD73311 implementation offers a very low level of group
delay, which is given by the following relationship:
Group Delay (Decimator) = Order
×
((M–
1
)/
2
)
×
Tdec
where:
Order
is the order of the decimator (= 3),
M
is the decimation factor (= 32) and
Tdec
is the decimation sample interval (= 1/2.048e6)
=> Group Delay (Decimator) = 3
×
(32–1)/2
×
(1/2.048e6)
= 22.7
μ
s
If final filtering is implemented in the DSP, the final filter’s
group delay must be taken into account when calculating overall
group delay.
Decoder Section
The decoder section updates (samples) at the same rate as the
encoder section, MCLK/256, which gives a 64 kHz rate from an
external MCLK of 16.384 MHz. Figure 19 shows the spectral
response of the decoder section sampling at 64 kHz. Again, its
sigma-delta modulator shapes the noise so it is reduced in the
voice bandwidth dc–4 kHz. For improved voiceband SNR, the
user can implement an initial anti-imaging filter, preceded by
8 kHz to 64 kHz interpolation, in the DSP.
FREQUENCY – kHz
0
–1400
32
5
d
10
15
20
25
30
–20
–60
–80
–100
–120
–40
S/N+D = 58.454842
Figure 19. FFT (DAC 64 kHz Sampling)
As is the case with the encoder section, voiceband SNR is re-
duced if the DMCLK rate is reduced as shown by the example
of 16 kHz sampling in Figure 20. This is due to the noise-shap-
ing of the sigma-delta modulator being compressed into a
smaller bandwidth, which increases the noise in the voice BW.
FREQUENCY – kHz
0
–140
0
8
1
2
3
4
5
6
7
–20
–60
–80
–100
–120
–40
d
S/N+D = 57.441659
Figure 20. FFT (DAC 16 kHz Sampling)
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PDF描述 |
|---|---|
| AD73322LARU | Low Cost, Low Power CMOS General-Purpose Dual Analog Front End |
| AD73322AR | Low Cost, Low Power CMOS General-Purpose Dual Analog Front End |
| AD73322AST | Low Cost, Low Power CMOS General-Purpose Dual Analog Front End |
| AD73322LAR | Low Cost, Low Power CMOS General-Purpose Dual Analog Front End |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD73311AR | 制造商:Analog Devices 功能描述:Audio Codec 1ADC / 1DAC 16-Bit 20-Pin SOIC W 制造商:Rochester Electronics LLC 功能描述:SPEECH & TELEPHONY CODEC I.C. - Bulk 制造商:Analog Devices 功能描述:SPEECH/TELEPHONY CODEC SMD 73311 |
| AD73311AR-REEL | 制造商:Analog Devices 功能描述:Audio Codec 1ADC / 1DAC 16-Bit 20-Pin SOIC W T/R |
| AD73311ARS | 制造商:Analog Devices 功能描述:Audio Codec 1ADC / 1DAC 16-Bit 20-Pin SSOP |
| AD73311ARS-REEL | 制造商:Analog Devices 功能描述:Audio Codec 1ADC / 1DAC 16-Bit 20-Pin SSOP T/R 制造商:Rochester Electronics LLC 功能描述:SPEECH & TELEPHONY CODEC I.C. - Tape and Reel |
| AD73311ARSZ | 功能描述:IC ANALOG FRONT END 20-SSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模拟前端 (AFE) 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:- 通道数:2 功率（瓦特）:- 电压 - 电源，模拟:3 V ~ 3.6 V 电压 - 电源，数字:3 V ~ 3.6 V 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN（5x5） 包装:带卷 (TR) |
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