参数资料
型号: AD73311
厂商: Analog Devices, Inc.
英文描述: Low Cost, Low Power CMOS General Purpose Analog Front End Processor(低成本、低功耗、CMOS通用模拟前端处理器)
中文描述: 低成本,低功耗CMOS通用模拟前端处理器(低成本,低功耗,的CMOS通用模拟前端处理器)
文件页数: 3/36页
文件大小: 290K
代理商: AD73311
AD73311A
Parameter
DAC SPECIFICATIONS (Continued)
Power Supply Rejection
Min
Typ
Max
Units
Test Conditions/Comments
–55
dB
Input Signal Level at AVDD and DVDD
Pins: 1.0 kHz, 100 mV p-p Sine Wave
64 kHz Input Sample Rate, Interpolator
Bypassed (CRE:5 = 1)
PGA = 6 dB
Group Delay
4, 5
25
μ
s
Output DC Offset
2, 7
Minimum Load Resistance, R
L2, 8
Single-Ended
Differential
Maximum Load Capacitance, C
L2, 8
Single-Ended
Differential
FREQUENCY RESPONSE
(ADC AND DAC)
9
Typical Output
0 Hz
2000 Hz
4000 Hz
8000 Hz
12000 Hz
16000 Hz
20000 Hz
24000 Hz
28000 Hz
> 32000 Hz
LOGIC INPUTS
V
INH
, Input High Voltage
V
INL
, Input Low Voltage
I
IH
, Input Current
C
IN
, Input Capacitance
LOGIC OUTPUT
V
OH
, Output High Voltage
V
OL
, Output Low Voltage
Three-State Leakage Current
POWER SUPPLIES
AVDD1, AVDD2
DVDD
I
DD10
–30
+20
+70
mV
150
150
500
100
pF
pF
0
–0.1
–0.25
–0.6
–1.4
–2.8
–4.5
–7.0
–9.5
< –12.5
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Channel Frequency Response Is
Programmable by Means of External
Digital Filtering
V
DD
– 0.8
0
V
DD
0.8
10
10
V
V
μ
A
pF
V
DD
– 0.4
0
–10
V
DD
0.4
+10
V
V
μ
A
|IOUT|
100
μ
A
|IOUT|
100
μ
A
2.7
2.7
3.3
3.3
V
V
See Table I
NOTES
Operating temperature range is as follows: –40
°
C to +85
°
C. Therefore, T
= –40
°
C and T
= +85
°
C.
2
Test conditions: Input PGA set for 0 dB gain, Output PGA set for 6 dB gain, no load on analog outputs (unless otherwise noted).
3
At input to sigma-delta modulator of ADC.
4
Guaranteed by design.
5
Overall group delay will be affected by the sample rate and the external digital filtering.
6
The ADC’s input impedance is inversely proportional to DMCLK and is approximated by: (4
×
10
11
)/DMCLK.
7
Between VOUTP and VOUTN.
8
At VOUT output.
9
Frequency responses of ADC and DAC measured with input at audio reference level (the input level that produces an output level of –10 dBm0), with 38 dB preamplifier
bypassed and input gain of 0 dB.
10
Test Conditions: no load on digital inputs, analog inputs ac coupled to ground, no load on analog outputs.
Specifications subject to change without notice.
Table I. Current Summary (AVDD = DVDD = +3.3 V)
Analog
Current Current
7
10
0.75
Internal Digital
External Interface
Current
0.5
0.5
0
Total Current
(Max)
11.5
17.5
1.0
MCLK
ON
YES
YES
NO
Conditions
ADC On Only
ADC and DAC On
REFCAP On Only
REFCAP and
REFOUT On Only 3.0
All Sections Off
SE
1
1
0
Comments
REFOUT Disabled
REFOUT Disabled
REFOUT Disabled
3
5
0
0
0.85
0
0
4.5
1.0
0
0
NO
YES
0
MCLK Active Levels Equal to
0 V and DVDD
Digital Inputs Static and Equal
to 0 V or DVDD
All Sections Off
0.00
0.007
0
0.04
0
NO
The above values are in mA and are typical values unless otherwise noted.
AD73311
–3–
REV. A
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