参数资料
型号: AD73311L
厂商: Analog Devices, Inc.
英文描述: Low Cost, Low Power CMOS General Purpose Analog Front End Processor(低成本,低功耗的CMOS通用双模拟前端处理器)
中文描述: 低成本,低功耗CMOS通用模拟前端处理器(低成本,低功耗的的CMOS通用双模拟前端处理器)
文件页数: 16/20页
文件大小: 132K
代理商: AD73311L
AD73311L
–16–
REV. PrA1
09/98
PRELMNARY
1 = Bypass Enabled)
6
Reserved
Must be programmed to zero (0)
7
Reserved
Must be programmed to zero (0)
TECHNCAL
IBYP
Interpolator Bypass (0 = Bypass Disabled;
T able X VI. Control Register D Description
C ONT ROL RE GIST E R D
7
6
5
4
3
2
1
0
MUT E
OGS2
OGS1
OGS0
RMOD
IGS2
IGS1
IGS0
Bit
Name
Description
0
1
2
3
4
5
6
7
IGS0
IGS1
IGS2
RMOD
OGS0
OGS1
OGS2
MUT E
Input Gain Select (Bit 0)
Input Gain Select (Bit 1)
Input Gain Select (Bit 2)
Reset ADC Modulator (0 = Off; 1 = Reset Enabled)
Output Gain Select (Bit 0)
Output Gain Select (Bit 1)
Output Gain Select (Bit 2)
Output Mute (0 = Mute Off; 1 = Mute Enabled)
T able X VII. Control Register E Description
C ONT ROL RE GIST E R E
7
-
6
-
5
4
3
2
1
0
IBYP
DA4
DA3
DA2
DA1
DA0
Bit
Name
Description
0
1
2
3
4
5
DA0
DA1
DA2
DA3
DA4
DAC Advance Setting (Bit 0)
DAC Advance Setting (Bit 1)
DAC Advance Setting (Bit 2)
DAC Advance Setting (Bit 3)
DAC Advance Setting (Bit 4)
T able X VIII. Control Register F Description
C ONT ROL RE GIST E R F
7
6
5
4
-
3
-
2
-
1
-
0
-
AL B
INV
SE E N
Bit
Name
Description
0
1
2
3
4
5
6
7
Reserved
Reserved
Reserved
Reserved
Reserved
SEEN
INV
ALB
Must be programmed to zero (0)
Must be programmed to zero (0)
Must be programmed to zero (0)
Must be programmed to zero (0)
Must be programmed to zero (0)
Single-Ended Enable (0 = Disabled; 1 = Enabled)
Input Invert(0 = Disabled; 1 = Enabled)
Analog Loopback of Output to Input (0 = Disabled; 1 = Enabled)
相关PDF资料
PDF描述
AD73311 Low Cost, Low Power CMOS General Purpose Analog Front End Processor(低成本、低功耗、CMOS通用模拟前端处理器)
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