参数资料
型号: AD73460BB-80
厂商: ANALOG DEVICES INC
元件分类: 数字信号处理
英文描述: Six-Input Channel Analog Front End
中文描述: 24-BIT, 26 MHz, OTHER DSP, PBGA119
封装: PLASTIC, CHIP SCALE, BGA-119
文件页数: 15/32页
文件大小: 290K
代理商: AD73460BB-80
AD73460
–15–
REV. 0
Table VI. Control Register Map
Address (Binary)
Name
Description
Type
Width
Reset Setting (Hex)
000
001
010
011
100
101
110
111
CRA
CRB
CRC
CRD
CRE
CRF
CRG
CRH
Control Register A
Control Register B
Control Register C
Control Register D
Control Register E
Control Register F
Control Register G
Control Register H
R/
W
R/
W
R/
W
R/
W
R/
W
R/
W
R/
W
R/
W
8
8
8
8
8
8
8
8
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
Table VII. Control Word Description
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
C/
D
R/
W
DEVICE ADDRESS
REGISTER ADDRESS
REGISTER DATA
Control
Frame
Description
Bit 15
CONTROL/
DATA
When set high, it signifies a control word in Program or Mixed Program/Data Modes. When
set low, it signifies an invalid control word in Program Mode.
When set low, it tells the device that the data field is to be written to the register selected by
the register field setting provided the address field is zero. When set high, it tells the device
that the selected register is to be written to the data field in the serial register and that
the new control word is to be output from the device via the serial output.
This 3-bit field holds the address information. Only when this field is zero is a device se-
lected. If the address is not zero, it is decremented and the control word is passed out of the
device via the serial output.
This 3-bit field is used to select one of the eight control registers on the AD73460.
This 8-bit field holds the data that is to be written to or read from the selected register pro-
vided the address field is zero.
Bit 14
READ/
WRITE
Bits 13
11
DEVICE ADDRESS
Bits 10
8
Bits 7
0
REGISTER ADDRESS
REGISTER DATA
CONTROL REGISTER A
Table VIII. Control Register A Description
Bit
Name
Description
0
1
2
3
4
5
6
7
DATA/
PGM
MM
Reserved
SLB
DC0
DC1
DC2
RESET
Operating Mode (0 = Program; 1 = Data Mode)
Mixed Mode (0 = OFF; 1 = Enabled)
Must Be Programmed to Zero (0)
SPORT Loop-Back Mode (0 = OFF; 1 = Enabled)
Device Count (Bit 0)
Device Count (Bit 1)
Device Count (Bit 2)
Software Reset (0 = OFF; 1 = Initiates Reset)
7
6
5
4
3
2
1
0
RESET
DC2
DC1
DC0
SLB
RES
MM
DATA/
PGM
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