参数资料
型号: AD7490BRUZ-REEL7
厂商: Analog Devices Inc
文件页数: 10/29页
文件大小: 0K
描述: IC ADC 12BIT 16CHAN 28TSSOP
产品变化通告: IDD Specification Change 17/Jun/2009
标准包装: 1,000
位数: 12
采样率(每秒): 1M
数据接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 12.5mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 28-TSSOP
包装: 带卷 (TR)
输入数目和类型: 16 个单端,单极
Data Sheet
AD7490
Rev. D | Page 17 of 28
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of total harmonic
distortion (THD) that can be tolerated. The THD increases as
the source impedance increases, and performance degrades (see
ADC TRANSFER FUNCTION
The output coding of the AD7490 is either straight binary or
twos complement depending on the status of the LSB
(CODING bit) in the control register. The designed code
transitions occur midway between successive LSB values (that
is, 1 LSB, 2 LSBs, and so on). The LSB size is equal to
REFIN/4096. The ideal transfer characteristic for the AD7490
when straight binary coding is selected is shown in Figure 18.
02
69
1-
0
17
111...111
111...110
111...000
000...010
011...111
000...001
000...000
0V
1LSB
+VREF – 1LSB
1LSB = VREF/4096
VREF IS EITHER REFIN OR 2 × REFIN
ANALOG INPUT
Figure 18. Straight Binary Transfer Characteristic
Handling Bipolar Input Signals
Figure 20 shows how useful the combination of the 2 × REFIN
input range and the twos complement output coding scheme is
for handling bipolar input signals. If the bipolar input signal is
biased about REFIN and twos complement output coding is
selected, REFIN becomes the zero code point, REFIN is negative
full scale, and +REFIN becomes positive full scale, with a
dynamic range of 2 × REFIN.
02
69
1-
0
18
011...111
011...110
000...001
000...000
111...111
100...010
100...001
100...000
+VREF – 1LSB
–VREF + 1LSB
1LSB = 2 × VREF/4096
VREF – 1LSB
ANALOG INPUT
AD
C
CO
DE
Figure 19. Twos Complement Transfer Characteristic
with REFIN ± REFIN Input Range
02
69
1-
01
9
VREF
REFIN
VIN0
DOUT
TWOS
COMPLEMENT
DSP/P
VDRIVE
VDD
AD7490
VIN15
V
0V
V
0.1F
R3
R1 = R2 = R3 = R4
R2
R1
R4
+REFIN
(= 2 × REFIN)
–REFIN
(= 0V)
REFIN
011...111
000...000
100...000
Figure 20. Handling Bipolar Signals
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