参数资料
| 型号： | AD7606BSTZ-4RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 19/36页 |
| 文件大小： | 0K |
| 描述： | IC DAS W/ADC 16BIT 64LQFP |
| 设计资源： | Layout Considerations for an Expandable Multichannel Simultaneous Sampling Data Acquisition System Based on AD7606 (CN0148) |
| 标准包装： | 1 |
| 类型： | 数据采集系统（DAS），ADC |
| 分辨率（位）： | 16 b |
| 采样率（每秒）： | 200k |
| 数据接口： | DSP，MICROWIRE?，并联，QSPI?，串行，SPI? |
| 电压电源： | 模拟和数字 |
| 电源电压： | 2.3 V ~ 5.25 V，4.75 V ~ 5.25 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 标准包装 |
| 其它名称： | AD7606BSTZ-4RLDKR |
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AD7606/AD7606-6/AD7606-4
Data Sheet
Rev. C | Page 26 of 36
CONVERSION CONTROL
Simultaneous Sampling on All Analog Input Channels
The AD7606/AD7606-6/AD7606-4 allow simultaneous sampling
of all analog input channels. All channels are sampled simul-
taneously when both CONVST pins (CONVST A, CONVST B)
are tied together. A single CONVST signal is used to control both
CONVST x inputs. The rising edge of this common CONVST
signal initiates simultaneous sampling on all analog input channels
(V1 to V8 for the AD7606, V1 to V6 for the AD7606-6, and V1
to V4 for the AD7606-4).
The AD7606 contains an on-chip oscillator that is used to
perform the conversions. The conversion time for all ADC
channels is tCONV. The BUSY signal indicates to the user when
conversions are in progress, so when the rising edge of CONVST
is applied, BUSY goes logic high and transitions low at the end
of the entire conversion process. The falling edge of the BUSY
signal is used to place all eight track-and-hold amplifiers back
into track mode. The falling edge of BUSY also indicates that
the new data can now be read from the parallel bus (DB[15:0]),
the DOUTA and DOUTB serial data lines, or the parallel byte bus,
DB[7:0].
Simultaneously Sampling Two Sets of Channels
The AD7606/AD7606-6/AD7606-4 also allow the analog input
channels to be sampled simultaneously in two sets. This can be
used in power-line protection and measurement systems to
compensate for phase differences introduced by PT and CT
transformers. In a 50 Hz system, this allows for up to 9° of phase
compensation; and in a 60 Hz system, it allows for up to 10° of
phase compensation.
This is accomplished by pulsing the two CONVST pins
independently and is possible only if oversampling is not in use.
CONVST A is used to initiate simultaneous sampling of the
first set of channels (V1 to V4 for the AD7606, V1 to V3 for the
AD7606-6, and V1 and V2 for the AD7606-4); and CONVST B
is used to initiate simultaneous sampling on the second set of
analog input channels (V5 to V8 for the AD7606, V4 to V6 for
the AD7606-6, and V3 and V4 for the AD7606-4), as illustrated
in Figure 44. On the rising edge of CONVST A, the track-and-
hold amplifiers for the first set of channels are placed into hold
mode. On the rising edge of CONVST B, the track-and-hold
amplifiers for the second set of channels are placed into hold
mode. The conversion process begins once both rising edges
of CONVST x have occurred; therefore BUSY goes high on the
rising edge of the later CONVST x signal. In Table 3, Time t5
indicates the maximum allowable time between CONVST x
sampling points.
There is no change to the data read process when using two
separate CONVST x signals.
Connect all unused analog input channels to AGND. The results
for any unused channels are still included in the data read because
all channels are always converted.
CONVST A
CONVST B
BUSY
CS/RD
DATA: DB[15:0]
FRSTDATA
V1
V2
V3
V7
V8
t5
tCONV
V1 TO V4 TRACK-AND-HOLD
ENTER HOLD
V5 TO V8 TRACK-AND-HOLD
ENTER HOLD
AD7606 CONVERTS
ON ALL 8 CHANNELS
08479-
042
Figure 44. AD7606 Simultaneous Sampling on Channel Sets While Using Independent CONVST A and CONVST B Signals—Parallel Mode
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相关代理商/技术参数 |
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| AD7606BSTZ-6 | 功能描述:IC DAS W/ADC 16BIT 6CH 64LQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - ADCs/DAC - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 类型:数据采集系统（DAS） 分辨率（位）:16 b 采样率（每秒）:21.94k 数据接口:MICROWIRE?，QSPI?，串行，SPI? 电压电源:模拟和数字 电源电压:1.8 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（6x6） 包装:托盘 |
| AD7606BSTZ-6RL | 功能描述:IC DAS W/ADC 16BIT 64LQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - ADCs/DAC - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 类型:数据采集系统（DAS） 分辨率（位）:16 b 采样率（每秒）:21.94k 数据接口:MICROWIRE?，QSPI?，串行，SPI? 电压电源:模拟和数字 电源电压:1.8 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（6x6） 包装:托盘 |
| AD7606BSTZ-RL | 功能描述:IC DAS W/ADC 16BIT 64LQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - ADCs/DAC - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 类型:数据采集系统（DAS） 分辨率（位）:16 b 采样率（每秒）:21.94k 数据接口:MICROWIRE?，QSPI?，串行，SPI? 电压电源:模拟和数字 电源电压:1.8 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（6x6） 包装:托盘 |
| AD7607 | 制造商:AD 制造商全称:Analog Devices 功能描述:8-Channel Differential DAS with 18-Bit, Bipolar, Simultaneous Sampling ADC |
| AD7607BSTZ | 功能描述:IC DAS W/ADC 14BIT 8CH 64LQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - ADCs/DAC - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 类型:数据采集系统（DAS） 分辨率（位）:16 b 采样率（每秒）:21.94k 数据接口:MICROWIRE?，QSPI?，串行，SPI? 电压电源:模拟和数字 电源电压:1.8 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（6x6） 包装:托盘 |
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