AD8330
Data Sheet
Rev. F | Page 26 of 32
COMM
OPHI
INLO
OPLO
INHI
VPSI
VPSO
CMOP
MODE
VDBS
CMGN
VMAG
OFST
CNTR
ENBL
VPOS
BIAS AND
V-REF
CM MODE AND
OFFSET CONTROL
OUTPUT
STAGES
NC
INPUT,
5mV TO 1V rms
0.1F
10
GAIN INTERFACE
33nF
R1
10k
0.1F
4.7
Q2
Q1
SEE
TEXT
C1
0.1F
OUTPUT,
~1V rms
03217-
065
VS, 2.7V–6V
OUTPUT
CONTROL
VGA CORE
Figure 64. Simple AGC Amplifier (Preliminary)
When the loop is settled, the average current in Q1 is VDBS/R1,
which varies from 2 μA at maximum gain (VDBS = 0.2 V) to
17 μA at minimum gain (VDBS = 1.7 V). This change in the Q1
current causes an increase of ~0.25 dB over the full gain range
in the differential output of nominally 0.75 dBV at midrange
(3.08 V p-p), corresponding to a 200:1 compression ratio. This
INPUT TO AD8330 (dBV)
1.0
0
2
–
0
4
–
0
5
–
L
EVEL
ED
O
U
T
PU
T
(d
B
V)
0.8
0.7
0.6
0.5
–30
0.9
–10
03217-
066
Figure 65. AGC Output vs. Input Amplitude (Simulation)
The upper panel i
n Figure 66 shows the time-domain output for
fourteen 3 dB steps in input amplitude from 5.4 mV to 1.7 V.
The waveforms in Figure 65 show the AGC voltage (VDBS). This simple detector exhibits a temperature variation in the
differential output amplitude of about 4 mV/°C. It provides a
fast attack time (an increase in the input is quickly leveled to the
nominal output, due to the high peak currents in Q1) and a
slow release time (a decrease in the input is not restored as
quickly). The voltage at the VDBS pin can be used as an RSSI
output, scaled 30 mV/dB. Note that the attack time can be
halved by adding a second transistor, labeled Q2 i
n Figure 64.For operation at lower frequencies, the AGC hold capacitor
must be increased.
WIDE RANGE TRUE RMS VOLTMETER
The
AD8362 is an rms responding detector providing a
dynamic range of 60 dB from low frequencies to 2.7 GHz.
This can increase to 110 dB using an AD8330 as a precondi-
tioner, provided the noise bandwidth is limited by an interstage
low-pass or band-pass filter.
The VGA also provides an input port that is easier to drive
general scheme.
Both the AD8330 and
AD8362 provide linear-in-decibel control
interfaces. Thus, when the output of th
e AD8362 is used to control
the gain of the AD8330, the functional form is unaffected. The
overall scaling is 33 mV/dB
. Figure 68 shows the time domain
response using a loop filter capacitor of 10 nF, for inputs rang-
ing from 10 μV to 1 V rms, that is, a 100 dB measurement range.
TIME (s)
0
G
AI
N
E
R
O
R
(
d
B)
–1
1
–3
3
10
20
30
40
50
60
70
80
90
100 110 120 130 140 150
–2
0
–4
2
0.75
1.25
0.25
1.75
0.50
1.00
0
1.50
VDBS
OUTPUT
03217-
067
Figure 66. Time Domain Waveforms (Simulation)