参数资料
| 型号： | AD9042ASTZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/24页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 41MSPS 44-TQFP |
| 标准包装： | 1 |
| 位数： | 12 |
| 采样率（每秒）： | 41M |
| 数据接口： | 并联 |
| 转换器数目： | 3 |
| 功率耗散（最大）： | 735mW |
| 电压电源： | 模拟和数字，双 ± |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-LQFP |
| 供应商设备封装： | 44-LQFP（10x10） |
| 包装： | 托盘 |
| 输入数目和类型： | 1 个单端，双极 |
| 产品目录页面： | 780 (CN2011-ZH PDF) |
AD9042
Rev. B | Page 19 of 24
performance. The result can be a marked improvement in the
SFDR of the data converter.
this injection of dither (see Figure 13). SFDR is now 94 dBFS.
adding dither.
To fully appreciate the improvement that dither can have on
one using and one not using dither. Increasing to 128k sample
points lowers the noise floor of the FFT; this simply makes it
easier to see the dramatic reduction in spurious levels resulting
from dither.
14
13
12
11
9
16
15
10
8
1
2
3
4
7
6
5
AD600
A
REF
1F
0.1F
+15V
+5V
–5V
OP27
LOW CONTROL
(0V TO 1V)
2k
1k
OPTIONAL HIGH
POWER DRIVE
CIRCUIT
2.2k
16k
NC202
NOISE
DIODE
(Noisecom)
39
390
005
54-
058
Figure 40. Noise Source (Dither Generator)
The simplest method for generating dither is through the use of
a noise diode (see Figure 40). In this circuit, the noise diode,
NC202, generates the reference noise that is gained up and
noise can be controlled by either presetting the control voltage
when the system is set up or by using a digital-to-analog
converter (DAC) to adjust the noise level based on input signal
conditions. Once generated, the signal must be introduced to
the receiver strip. The easiest method is to inject the signal into
the drive chain after the last downconversion, as shown in
AD9042
NOISE SOURCE
FROM
RF/IF
AIN
VOFFSET
VREF
LPF
00
55
4-
05
9
Figure 41. Using the AD9042 with Dither
RECEIVER EXAMPLE
To determine how the ADC performance relates to overall
receiver sensitivity, the simple receiver in Figure 42 can be
examined. This example assumes that the overall downconversion
process can be grouped into one set of specifications, instead of
individually examining all components within the system and
summing them together. Although a more detailed analysis
should be employed in a real design, this model provides a good
approximation.
In examining a wideband digital receiver, several considerations
must be applied. Although other specifications are important,
receiver sensitivity determines the absolute limits of a radio,
excluding the effects of other outside influences. Assuming that
receiver sensitivity is limited by noise and not by adjacent signal
strength, several sources of noise can be identified and their
overall contribution to receiver sensitivity calculated.
RF/IF
AD9042
CHANNELIZER
REF IN
DSP
ENCODE
40.96MHz
GAIN = 30dB
NF = 20dB
BW = 12.5MHz
SINGLE CHANNEL
BW = 30kHz
00
55
4-
06
0
Figure 42. Receiver Analysis
The first noise calculation to make is based on the signal
bandwidth at the antenna. In a typical broadband cellular
receiver, the IF bandwidth is 12.5 MHz. Given that the power of
noise in a given bandwidth is defined by Pn = kTB, where B is
bandwidth, k = 1.38 × 1023 is Boltzmann’s constant, and T =
300k is absolute temperature, this gives an input noise power of
5.18 × 1014 watts or 102.86 dBm. If the receiver front end has a
gain of 30 dB and a noise figure of 20 dB, then the total noise
presented to the ADC input becomes 52.86 dBm (102.86 + 30
+ 20) or 0.51 mV rms. Comparing receiver noise to the dither
required for good SFDR, note that in this example, the receiver
supplies about 10% of the dither required for good SFDR.
Based on a typical ADC SNR specification of 68 dB, the
equivalent internal converter noise is 0.140 mV rms. Therefore,
total broadband noise is 0.529 mV rms. Before processing gain,
this is an equivalent SNR (with respect to full scale) of 56.5 dB.
Assuming a 30 kHz AMPS signal and a sample rate of 40.96 MSPS,
the SNR, through processing gain, is increased by 28.3 dB to
84.8 dB. However, if eight strong and equal signals are present
in the ADC bandwidth, each must be placed 18 dB below full
scale to prevent ADC overdrive. In addition, 3 dB to 15 dB
should be used for ADC headroom should another signal come
in-band unexpectedly. For this example, 12 dB of headroom can
be allocated. Therefore, 30 dB of range is given away and the
carrier-to-noise ratio (C/N) is reduced to 54.8 dB (C/N is the
ratio of signal to in-band noise).
相关PDF资料 |
PDF描述 |
|---|---|
| AD9051BRSRL-2V | IC ADC 10BIT 60MSPS 28-SSOP |
| AD9054ABSTZ-200 | IC ADC 8BIT 200MSPS 44-LQFP |
| AD9057BRS-RL40 | IC ADC 8BIT 40MSPS 20-SSOP T/R |
| AD9058AKD | IC ADC 8BIT DUAL 50MSPS 48-CDIP |
| AD9059BRS | IC ADC 8BIT DUAL 60MSPS 28-SSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9042BD | 制造商:Analog Devices 功能描述:- Bulk |
| AD9042CHIPS | 制造商:AD 制造商全称:Analog Devices 功能描述:12-Bit, 41 MSPS Monolithic A/D Converter |
| AD9042D | 制造商:AD 制造商全称:Analog Devices 功能描述:12-Bit, 41 MSPS Monolithic A/D Converter |
| AD9042D/PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:12-Bit, 41 MSPS Monolithic A/D Converter |
| AD9042DPCB | 制造商:AD 制造商全称:Analog Devices 功能描述:12-Bit, 41 MSPS Monolithic A/D Converter |
发布紧急采购，3分钟左右您将得到回复。