参数资料
| 型号： | AD9042ASTZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 3/24页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 41MSPS 44-TQFP |
| 标准包装： | 1 |
| 位数： | 12 |
| 采样率（每秒）： | 41M |
| 数据接口： | 并联 |
| 转换器数目： | 3 |
| 功率耗散（最大）： | 735mW |
| 电压电源： | 模拟和数字，双 ± |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-LQFP |
| 供应商设备封装： | 44-LQFP（10x10） |
| 包装： | 托盘 |
| 输入数目和类型： | 1 个单端，双极 |
| 产品目录页面： | 780 (CN2011-ZH PDF) |
AD9042
Rev. B | Page 11 of 24
TERMINOLOGY
Analog Bandwidth
The analog input frequency at which the spectral power of the
fundamental frequency (as determined by the FFT analysis) is
reduced by 3 dB.
Aperture Delay
The delay between the 50% point of the rising edge of the
ENCODE command and the instant at which the analog input
is sampled.
Aperture Uncertainty (Jitter)
The sample-to-sample variation in aperture delay.
Differential Nonlinearity (DNL)
The deviation of any code from an ideal 1 LSB step.
Encode Pulse Width/Duty Cycle
Pulse width high is the minimum amount of time that the
ENCODE pulse should be left in a Logic 1 state to achieve the
rated performance; pulse width low is the minimum time that
the ENCODE pulse should be left in low state. At a given clock
rate, these specifications define an acceptable encode duty cycle.
Harmonic Distortion
The ratio of the rms signal amplitude to the rms value of the
worst harmonic component, reported in dBc.
Integral Nonlinearity (INL)
The deviation of the transfer function from a reference line
measured in fractions of 1 LSB using a best straight line
determined by a least square curve fit.
Maximum Conversion Rate
The encode rate at which parametric testing is performed.
Minimum Conversion Rate
The encode rate at which the SNR of the lowest analog signal
frequency drops by no more than 3 dB below the guaranteed limit.
Output Propagation Delay
The delay between the 50% point of the rising edge of the
ENCODE command and the time when all output data bits
are within valid logic levels.
Overvoltage Recovery Time
The amount of time required for the converter to recover to
0.02% accuracy after an analog input signal 150% of full scale is
reduced to midscale.
Power Supply Rejection Ratio (PSRR)
The ratio of a change in input offset voltage to a change in
power supply voltage.
Signal-to-Noise-and-Distortion (SINAD) Ratio
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral
components, including harmonics but excluding dc.
Signal-to-Noise Ratio SNR (Without Harmonics)
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral
components, excluding the first five harmonics and dc.
Spurious-Free Dynamic Range (SFDR)
The ratio of the rms signal amplitude to the rms value of the
peak spurious spectral component. The peak spurious
component may or may not be a harmonic. May be reported in
decibels (degrades as signal levels is lowered) or in decibels
relative to full scale (always related back to converter full scale).
Transient Response
The time required for the converter to achieve 0.02% accuracy
when a one-half full-scale step function is applied to the
analog input.
Two-Tone Intermodulation Distortion Rejection
The ratio of the rms value of either input tone to the rms value
of the worst third-order intermodulation product; reported in dBc.
Two-Tone SFDR
The ratio of the rms value of either input tone to the rms value
of the peak spurious component. The peak spurious component
may or may not be an IMD product. May be reported in dBc
(degrades as signal level is lowered) or in dBFS (always related
back to converter full scale).
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9042BD | 制造商:Analog Devices 功能描述:- Bulk |
| AD9042CHIPS | 制造商:AD 制造商全称:Analog Devices 功能描述:12-Bit, 41 MSPS Monolithic A/D Converter |
| AD9042D | 制造商:AD 制造商全称:Analog Devices 功能描述:12-Bit, 41 MSPS Monolithic A/D Converter |
| AD9042D/PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:12-Bit, 41 MSPS Monolithic A/D Converter |
| AD9042DPCB | 制造商:AD 制造商全称:Analog Devices 功能描述:12-Bit, 41 MSPS Monolithic A/D Converter |
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