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参数资料
| 型号： | AD9146-M5375-EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 19/56页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD9146 DAC |
| 设计资源： | AD9146-M5375-EBZ Schematic AD9146-M5375-EBZ Gerber Files |
| 标准包装： | 1 |
| 系列： | TxDAC+® |
| DAC 的数量： | 2 |
| 位数： | 16 |
| 采样率（每秒）： | 1G |
| 数据接口： | 串行 |
| 设置时间： | 20ns |
| DAC 型： | 电流 |
| 工作温度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD9146 |
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AD9146
Data Sheet
Rev. A | Page 26 of 56
Register
Name
Address
(Hex)
Bits
Name
Description
Default
Q DAC
Control
0x45
7
Q DAC sleep
1 = puts the Q DAC into sleep mode (fast wake-up mode).
0
[1:0]
Q DAC FS Adj[9:8]
Q DAC FS Adj[9:0] sets the full-scale current of the Q DAC.
The full-scale current can be adjusted from 8.64 mA to
31.68 mA in step sizes of approximately 22.5 A.
01
0x000 = 8.64 mA.
…
0x200 = 20.16 mA.
…
0x3FF = 31.68 mA.
Q Aux DAC
Data
0x46
[7:0]
Q Aux DAC[7:0]
See Register 0x47, Bits[1:0].
00000000
Q Aux DAC
Control
0x47
7
Q aux DAC sign
0 = the Q auxiliary DAC sign is positive, and the current is
directed to the IOUT2P pin (Pin 38).
0
1 = the Q auxiliary DAC sign is negative, and the current is
directed to the IOUT2N pin (Pin 39).
6
Q aux DAC current
direction
0 = the Q auxiliary DAC sources current.
0
1 = the Q auxiliary DAC sinks current.
5
Q aux DAC sleep
1 = puts the Q auxiliary DAC into sleep mode.
0
[1:0]
Q Aux DAC[9:8]
Q Aux DAC[9:0] sets the magnitude of the auxiliary DAC
current. The range is 0 mA to 2 mA, and the step size is 2 A.
00
0x000 = 0.000 mA.
0x001 = 0.002 mA.
…
0x3FF = 2.046 mA.
Die Temp
Range
Control
0x48
[6:4]
FS Current[2:0]
Auxiliary ADC full-scale current.
000
000 = lowest current.
…
111 = highest current.
[3:1]
Reference Current[2:0]
Auxiliary ADC reference current.
001
000 = lowest current.
…
111 = highest current.
0
Capacitor value
Auxiliary ADC internal capacitor value.
0
0 = 5 pF.
1 = 10 pF.
Die Temp
LSB
0x49
[7:0]
Die Temp[7:0]
See Register 0x4A.
N/A
Die Temp
MSB
0x4A
[7:0]
Die Temp[15:8]
Die Temp[15:0] indicates the approximate die temperature.
For more information, see the Temperature Sensor section.
N/A
SED Control
0x67
7
SED compare enable
1 = enable the SED circuitry. None of the flags in this
register or the values in Register 0x70 through
Register 0x73 are significant if the SED is not enabled.
0
5
Sample error detected
1 = indicates an error was detected. The bit remains set until
cleared. Any write to this register clears this bit to 0.
0
3
Autoclear enable
1 = enable autoclear mode. This activates Bit 1 and Bit 0 of
this register and causes Register 0x70 through Register 0x73
to be autocleared when eight consecutive sample data sets
are received error free.
0
1
Compare fail
1 = indicates an error was detected. This bit remains set until
it is autocleared by the reception of eight consecutive error-
free comparisons or is cleared by a write to this register.
0
Compare pass
1 = indicates that the last sample comparison was error free.
0
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