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| 型号： | AD9241ASZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 3/24页 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT 1.25MSPS 44-MQFP |
| 标准包装： | 1 |
| 位数： | 14 |
| 采样率（每秒）： | 1.25M |
| 数据接口： | 并联 |
| 转换器数目： | 7 |
| 功率耗散（最大）： | 85mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-QFP |
| 供应商设备封装： | 44-MQFP（10x10） |
| 包装： | 托盘 |
| 输入数目和类型： | 2 个单端，单极；1 个差分，单极 |
| 产品目录页面： | 780 (CN2011-ZH PDF) |
AD9241
REV. 0
–11–
REFERENCE OPERATION
The AD9241 contains an onboard bandgap reference that pro-
vides a pin-strappable option to generate either a 1 V or 2.5 V
output. With the addition of two external resistors, the user can
generate reference voltages other than 1 V and 2.5 V. Another
alternative is to use an external reference for designs requiring
enhanced accuracy and/or drift performance. See Table II for a
summary of the pin-strapping options for the AD9241 reference
configurations.
Figure 26 shows a simplified model of the internal voltage refer-
ence of the AD9241. A pin-strappable reference amplifier buff-
ers a 1 V fixed reference. The output from the reference amplifier,
A1, appears on the VREF pin. The voltage on the VREF pin
determines the full-scale input span of the A/D. This input span
equals,
Full-Scale Input Span = 2
× VREF
A2
5k
5k
5k
5k
LOGIC
DISABLE
A2
7.5k
LOGIC
A1
5k
DISABLE
A1
1V
TO
A/D
AD9241
CAPT
CAPB
VREF
SENSE
REFCOM
Figure 26. Equivalent Reference Circuit
The voltage appearing at the VREF pin, and the state of the
internal reference amplifier, A1, are determined by the voltage
appearing at the SENSE pin. The logic circuitry contains two
comparators that monitor the voltage at the SENSE pin. The
comparator with the lowest set point (approximately 0.3 V)
controls the position of the switch within the feedback path of
A1. If the SENSE pin is tied to REFCOM, the switch is
connected to the internal resistor network thus providing a
VREF of 2.5 V. If the SENSE pin is tied to the VREF pin via a
short or resistor, the switch is connected to the SENSE pin. A
short will provide a VREF of 1.0 V while an external resistor
network will provide an alternative VREF between 1.0 V and
2.5 V. The second comparator controls internal circuitry that
will disable the reference amplifier if the SENSE pin is tied to
AVDD. Disabling the reference amplifier allows the VREF pin
to be driven by an external voltage reference.
The actual reference voltages used by the internal circuitry of
the AD9241 appear on the CAPT and CAPB pins. For proper
operation when using the internal or an external reference, it is
necessary to add a capacitor network to decouple these pins.
Figure 27 shows the recommended decoupling network. This
capacitive network performs the following three functions: (1) in
conjunction with the reference amplifier, A2, it provides a low
source impedance over a large frequency range to drive the A/D
internal circuitry, (2) it provides the necessary compensation for
A2, and (3) it bandlimits the noise contribution from the refer-
ence. The turn-on time of the reference voltage appearing be-
tween CAPT and CAPB is approximately 15 ms and should be
evaluated in any power-down mode of operation.
0.1F
10F
0.1F
CAPT
CAPB
AD9241
Figure 27. Recommended CAPT/CAPB Decoupling Network
The A/D’s input span may be varied dynamically by changing
the differential reference voltage appearing across CAPT and
CAPB symmetrically around 2.5 V (i.e., midsupply). To change
the reference at speeds beyond the capabilities of A2, it will be
necessary to drive CAPT and CAPB with two high speed, low
noise amplifiers. In this case, both internal amplifiers (i.e., A1
and A2) must be disabled by connecting SENSE to AVDD and
VREF to REFCOM, and the capacitive decoupling network
removed. The external voltages applied to CAPT and CAPB
must be 2.5 V + Input Span/4 and 2.5 V – Input Span/4, respec-
tively where the input span can be varied between 2 V and 5 V.
Note that those samples within the pipeline A/D during any
reference transition will be corrupted and should be discarded.
Table II. Reference Configuration Summary
Reference
Input Span (VINA–VINB)
Operating Mode
(V p-p)
Required VREF (V)
Connect
To
INTERNAL
2
1
SENSE
VREF
INTERNAL
5
2.5
SENSE
REFCOM
INTERNAL
2
≤ SPAN ≤ 5 AND
1
≤ VREF ≤ 2.5 AND
R1
VREF AND SENSE
SPAN = 2
× VREF
VREF = (1 + R1/R2)
R2
SENSE AND REFCOM
EXTERNAL
2
≤ SPAN ≤ 51 ≤ VREF ≤ 2.5
SENSE
AVDD
(NONDYNAMIC)
VREF
EXT. REF.
EXTERNAL
2
≤ SPAN ≤ 5
CAPT and CAPB
SENSE
AVDD
(DYNAMIC)
Externally Driven
VREF
REFCOM
EXT. REF. 1
CAPT
EXT. REF. 2
CAPB
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