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参数资料
| 型号： | AD9267BCPZRL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 19/24页 |
| 文件大小： | 0K |
| 描述： | IC MOD SIGMA-DELTA DUAL 64LFCSP |
| 标准包装： | 750 |
| 类型： | 三角积分调制器 |
| 应用： | 无线通信系统 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 64-LFCSP-VQ（9x9） |
| 包装： | 带卷 (TR) |
AD9267
Rev. 0 | Page 4 of 24
AC SPECIFICATIONS
All power supplies set to 1.8 V, 640 MHz sample rate, 0.5 V internal reference, PLL disabled, AIN1 = 2.0 dBFS, unless otherwise noted.
Table 2.
Parameter2
Temp
Min
Typ
Max
Unit
SIGNAL-TO-NOISE RATIO (SNR)
fIN = 2.4 MHz
Full
81
83
dB
fIN = 4.2 MHz
25°C
83
dB
fIN = 8.4 MHz
25°C
83
dB
SPURIOUS-FREE DYNAMIC RANGE (WORST SECOND OR THIRD HARMONIC)3
fIN = 2.4 MHz
Full
88
80
dBc
fIN = 4.2 MHz
25°C
88
dBc
fIN = 8.4 MHz
25°C
<120
dBc
NOISE SPECTRAL DENSITY
AIN = 2 dBFS
Full
155
153
dBFS/Hz
AIN = 40 dBFS
Full
156
155
dBFS/Hz
NOISE FIGURE2, 4
AIN = 2 dBFS
25°C
16
dB
AIN = 40 dBFS
25°C
15
dB
TWO-TONE SFDR
fIN1 = 1.8 MHz @ 8 dBFS, fIN2 = 2.1 MHz @ 8 dBFS
25°C
89.5
dBc
fIN1 = 3.7 MHz @ 8 dBFS, fIN2 = 4.2 MHz @ 8 dBFS
25°C
93
dBc
fIN1 = 7.2 MHz @ 8 dBFS, fIN2 = 8.4 MHz @ 8 dBFS
25°C
87
dBc
ANALOG INPUT BANDWIDTH
25°C
10
MHz
1 Input power is referenced to full scale. Therefore, all measurements were taken with a 2 dB signal below full scale, unless otherwise noted.
2 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions.
3 Spurious-free dynamic range excluding the second or third harmonic is limited by the FFT size, <120 dBFS.
4 Noise figure with respect to 50 Ω. AD9267 internal impedance is 1000 Ω differential. See the AN-835 for a definition.
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