参数资料
| 型号： | AD9444BSVZ-80 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 23/40页 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT 80MSPS 100TQFP |
| 标准包装： | 1 |
| 位数： | 14 |
| 采样率（每秒）： | 80M |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 1.4W |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-TQFP 裸露焊盘 |
| 供应商设备封装： | 100-TQFP-EP（14x14） |
| 包装： | 托盘 |
| 输入数目和类型： | 1 个差分，单极 |
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AD9444
Rev. 0 | Page 3 of 40
DC SPECIFICATIONS
AVDD1 = 3.3 V, AVDD2 = 5.0 V, DRVDD = 3.3 V, LVDS mode, sample rate = 80 MSPS, 2 V p-p differential input, internal trimmed
reference (1.0 V mode), AIN = 0.5 dBFS, DCS on, unless otherwise noted.
Table 1.
AD9444BSVZ-80
Parameter
Temp
Test Level
Min
Typ
Max
Unit
RESOLUTION
Full
VI
14
Bits
ACCURACY
No Missing Codes
Full
VI
Guaranteed
Offset Error
Full
VI
6
±0.3
6
mV
Gain Error1
Full
VI
3.0
±0.4
+3.0
% FSR
Differential Nonlinearity (DNL)2
Full
VI
0.8
±0.4
+0.8
LSB
Integral Nonlinearity (INL)2
25°C
I
1.3
±0.6
+1.3
LSB
Full
VI
1.7
+1.7
LSB
TEMPERATURE DRIFT
Offset Error
Full
V
12
V/°C
Gain Error
Full
V
0.002
%FS/°C
VOLTAGE REFERENCE
Output Voltage1
Full
VI
0.87
1.0
1.13
V
Load Regulation @ 1.0 mA
Full
V
±2
mV
Reference Input Current (External 1.0 V Reference)
Full
VI
80
125
A
INPUT REFERRED NOISE
25°C
V
1.0
LSB rms
ANALOG INPUT
Input Span
Full
V
2
V p-p
Input Common-Mode Voltage
Full
V
3.5
V
Input Resistance3
Full
V
1
k
Input Capacitance3
Full
V
2.5
pF
POWER SUPPLIES
Supply Voltage
AVDD1
Full
IV
3.14
3.3
3.46
V
AVDD2
Full
IV
4.75
5.0
5.25
V
DRVDD—LVDS Outputs
Full
IV
3.0
3.6
V
DRVDD—CMOS Outputs
Full
IV
3.0
3.3
3.6
V
Supply Current
AVDD1
Full
VI
217
240
mA
AVDD22
Full
VI
71
80
mA
IDRVDD2—LVDS Outputs
Full
VI
55
62
mA
IDRVDD2—CMOS Outputs
Full
V
12
mA
PSRR
Offset
Full
V
1
mV/V
Gain
Full
V
0.2
%/V
POWER CONSUMPTION
DC Input—LVDS Outputs
Full
VI
1.21
1.4
W
DC Input—CMOS Outputs
Full
V
1.07
W
Sine Wave Input2—LVDS Outputs
Full
VI
1.25
W
Sine Wave Input2—CMOS Outputs
Full
V
1.11
W
1 The internal voltage reference is trimmed at final test to minimize the gain error of the AD9444.
2 Measured at the maximum clock rate, fIN = 15 MHz, full-scale sine wave, with a 100 differential termination on each pair of output bits for LVDS output mode and
approximately 5 pF loading on each output bit for CMOS output mode.
3 Input capacitance or resistance refers to the effective impedance between one differential input pin and AGND. Refer to
for the equivalent analog input
structure.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9444-CMOS/PCB | 制造商:Analog Devices 功能描述:Evaluation Kit For 14-Bit, 80 MSPS, A/D Converter |
| AD9444-CMOSPCB | 制造商:AD 制造商全称:Analog Devices 功能描述:High Speed ADC USB FIFO Evaluation Kit |
| AD9444-LVDS/PCB | 制造商:Analog Devices 功能描述:14-BIT, 80 MSPS ADC PB FREE EVAL BD. - Trays |
| AD9444-LVDS/PCBZ | 制造商:Analog Devices 功能描述:LVDS Mode Evaluation Board 制造商:Analog Devices 功能描述:14-BIT, 80 MSPS ADC EVAL BD. - Bulk |
| AD9444-LVDSPCB | 制造商:AD 制造商全称:Analog Devices 功能描述:High Speed ADC USB FIFO Evaluation Kit |
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