参数资料
型号: AD9577BCPZ-R7
厂商: Analog Devices Inc
文件页数: 36/44页
文件大小: 0K
描述: IC CLOCK GENERATOR 40LFCSP
标准包装: 750
系列: PCI Express® (PCIe)
类型: 扇出缓冲器(分配),网络时钟发生器
PLL:
主要目的: 以太网,PCI Express(PCIe),SONET/SDH
输入: 时钟,晶体
输出: LVCMOS,LVDS,LVPECL
电路数: 1
比率 - 输入:输出: 2:5
差分 - 输入:输出: 无/是
频率 - 最大: 637.5MHz
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘,CSP
供应商设备封装: 40-LFCSP-WQ(6x6)
包装: 带卷 (TR)
其它名称: AD9577BCPZ-R7TR
Data Sheet
AD9577
Rev. 0 | Page 41 of 44
The AD9577 acts as a standard slave device on the bus. The data
on the SDA pin is eight bits long supporting the 7-bit addresses
plus the R/W bit. The
has 31 subaddresses to enable
the user-accessible internal registers (see
). Therefore, it
interprets the first byte as the device address and the second byte as
the starting subaddress. Auto-increment mode is supported, which
allows data to be read from or written to the starting subaddress
and each subsequent address without manually addressing the
subsequent subaddress. A data transfer is always terminated by
a stop condition. The user can also access any unique subaddress
register on a one-by-one basis without updating all registers.
Stop and start conditions can be detected at any stage of the data
transfer. If these conditions are asserted out of sequence with
normal read and write operations, they cause an immediate jump
to the idle condition. During a given SCL high period, one start
condition, one stop condition, or a single stop condition followed
by a single start condition should be issued. If an invalid subaddress
is issued, the AD9577 does not issue an acknowledge and returns
to the idle condition. If the highest subaddress is exceeded while
reading back in auto-increment mode, the highest subaddress
register contents continue to be output until the master device
issues a no acknowledge, which indicates the end of a read. In a no
acknowledge condition, the SDA line is not pulled low on the ninth
pulse. See Figure 45 and Figure 46 for sample read and write data
transfers, and see Figure 47 for a more detailed timing diagram.
To overwrite any of the default register values, complete the
following steps:
1.
Enable the overwriting of registers by setting EnI2C,
Register C0[1].
2.
Only write to registers that need modification from their
default value.
3.
After all the registers have been set, a new acquisition is
initiated by toggling NewAcq, Register X0[0] from low to high
to low.
An example set of I2C commands follows. These enable the I2C
registers and program the output frequencies of both PLLs. fPFD
is 25 MHz. A leading W represents a write command.
Table 32. I2C Programming Example Register Writes
Write/Read
Register Name
Data (Hex)
Operation
W
C0
02
Enable I2C registers
W
AF0
0A
Na = 80 + 10 = 90; fVCO1 = 2.25 GHz
W
ADV0
A6
Channel 0 divides by 5 × 6 = 30; fOUT0 = 75 MHz
W
ADV1
CC
Channel 1 divides by 6 × 12 = 72; fOUT1 = 31.25 MHz
W
BF3
15
Nb = 80 + 21 = 101; FVCO2 = 2.53832 GHz
W
BF0
14
FRAC = 333
W
BF1
D2
FRAC = 333, MOD = 625
W
BF2
71
MOD = 625
W
ABF0
C0
Power-up SDM, release SDM reset
W
BP0
04
Turn on Bleed
W
BDV0
44
Channel 2 divides by 2 × 4 = 8; fOUT2 = 317.29 MHz
W
BDV1
B0
Channel 3 divides by 5 × 16 = 80; fOUT3 = 31.729 MHz
W
X0
01
Force new acquisition by toggling NewAcq
W
X0
00
相关PDF资料
PDF描述
AD9600ABCPZ-150 IC ADC 10BIT 150MSPS 64LFCSP
AD9608BCPZRL7-125 IC ADC 10BIT 125MSPS 64LFCSP
AD9609BCPZRL7-80 IC ADC 10BIT SRL/SPI 80M 32LFCSP
AD9613BCPZ-170 IC ADC 12BIT SRL 170MSPS 64LFCSP
AD9627ABCPZ-125 IC ADC 12BIT 1255MSPS 64LFCSP
相关代理商/技术参数
参数描述
AD9577BCPZ-RL 功能描述:IC CLK GEN PLL DUAL 40LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:PCI Express® (PCIe) 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP (0.240",6.10mm 宽) 供应商设备封装:64-TSSOP 包装:管件
AD9577-EVALZ 制造商:AD 制造商全称:Analog Devices 功能描述:Clock Generator with Dual PLLs
AD9578BCPZ 功能描述:IC PLL CLOCK GEN 20MHZ 48LFCSP 制造商:analog devices inc. 系列:- 包装:托盘 零件状态:有效 类型:* PLL:带旁路 输入:LVCMOS,LVDS,LVPECL,晶体 输出:HCSL,LVCMOS,LVDS,LVPECL 电路数:1 比率 - 输入:输出:2:5 差分 - 输入:输出:是/是 频率 - 最大值:919MHz 分频器/倍频器:是/无 电压 - 电源:2.375 V ~ 3.63 V 工作温度:-25°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-WFQFN 裸露焊盘,CSP 供应商器件封装:48-LFCSP-VQ(7x7) 标准包装:1
AD9578BCPZ-REEL7 功能描述:IC PLL CLOCK GEN 20MHZ 48LFCSP 制造商:analog devices inc. 系列:- 包装:剪切带(CT) 零件状态:有效 类型:* PLL:带旁路 输入:LVCMOS,LVDS,LVPECL,晶体 输出:HCSL,LVCMOS,LVDS,LVPECL 电路数:1 比率 - 输入:输出:2:5 差分 - 输入:输出:是/是 频率 - 最大值:919MHz 分频器/倍频器:是/无 电压 - 电源:2.375 V ~ 3.63 V 工作温度:-25°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-WFQFN 裸露焊盘,CSP 供应商器件封装:48-LFCSP-VQ(7x7) 标准包装:1
AD95S08KAC 制造商:未知厂家 制造商全称:未知厂家 功能描述:THYRISTOR MODULE|DOUBLER|HALF-CNTLD|POSITIVE|15V V(RRM)|95A I(T)