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参数资料
| 型号： | AD9752-EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 17/23页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD9752 |
| 标准包装： | 1 |
| 系列： | TxDAC® |
| DAC 的数量： | 1 |
| 位数： | 12 |
| 采样率（每秒）： | 125M |
| 数据接口： | 并联 |
| 设置时间： | 35ns |
| DAC 型： | 电流 |
| 工作温度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD9752 |
REV. 0
–3–
AD9752
DYNAMIC SPECIFICATIONS
Parameter
Min
Typ
Max
Units
DYNAMIC PERFORMANCE
Maximum Output Update Rate (fCLOCK)
125
MSPS
Output Settling Time (tST) (to 0.1%)
1
35
ns
Output Propagation Delay (tPD)1
ns
Glitch Impulse
5
pV-s
Output Rise Time (10% to 90%)
1
2.5
ns
Output Fall Time (10% to 90%)
1
2.5
ns
Output Noise (IOUTFS = 20 mA)
50
pA/
√Hz
Output Noise (IOUTFS = 2 mA)
30
pA/
√Hz
AC LINEARITY
Spurious-Free Dynamic Range to Nyquist
fCLOCK = 25 MSPS; fOUT = 1.00 MHz
0 dBFS Output
TA = +25°C
75
84
dBc
–6 dBFS Output
76
dBc
–12 dBFS Output
81
dBc
fCLOCK = 50 MSPS; fOUT = 1.00 MHz
81
dBc
fCLOCK = 50 MSPS; fOUT = 2.51 MHz
81
dBc
fCLOCK = 50 MSPS; fOUT = 5.02 MHz
76
dBc
fCLOCK = 50 MSPS; fOUT = 14.02 MHz
62
dBc
fCLOCK = 50 MSPS; fOUT = 20.2 MHz
60
dBc
fCLOCK = 100 MSPS; fOUT = 2.5 MHz
78
dBc
fCLOCK = 100 MSPS; fOUT = 5 MHz
76
dBc
fCLOCK = 100 MSPS; fOUT = 20 MHz
63
dBc
fCLOCK = 100 MSPS; fOUT = 40 MHz
55
dBc
Spurious-Free Dynamic Range within a Window
fCLOCK = 25 MSPS; fOUT = 1.00 MHz
84
93
dBc
fCLOCK = 50 MSPS; fOUT = 5.02 MHz; 2 MHz Span
86
dBc
fCLOCK = 100 MSPS; fOUT = 5.04 MHz; 4 MHz Span
86
dBc
Total Harmonic Distortion
fCLOCK = 25 MSPS; fOUT = 1.00 MHz
TA = +25°C
–82
–74
dBc
fCLOCK = 50 MHz; fOUT = 2.00 MHz
–76
dBc
fCLOCK = 100 MHz; fOUT = 2.00 MHz
–76
dBc
Multitone Power Ratio (8 Tones at 110 kHz Spacing)
fCLOCK = 20 MSPS; fOUT = 2.00 MHz to 2.99 MHz
0 dBFS Output
81
dBc
–6 dBFS Output
81
dBc
–12 dBFS Output
85
dBc
–18 dBFS Output
86
dBc
NOTES
1Measured single ended into 50
load.
Specifications subject to change without notice.
(TMIN to TMAX, AVDD = +5 V, DVDD = +5 V, IOUTFS = 20 mA, Differential Transformer Coupled Output,
50
Doubly Terminated, unless otherwise noted)
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