参数资料
型号: ADA4930-2YCPZ-R2
厂商: Analog Devices Inc
文件页数: 17/29页
文件大小: 0K
描述: IC DIFF AMP 1.35GHZ 24-LFCSP
标准包装: 1
放大器类型: 差分
电路数: 2
输出类型: 差分
转换速率: 3400 V/µs
-3db带宽: 1.35GHz
电流 - 输入偏压: 23µA
电压 - 输入偏移: 150µV
电流 - 电源: 34mA
电流 - 输出 / 通道: 30mA
电压 - 电源,单路/双路(±): 3.3V,5V
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 24-VFQFN 裸露焊盘,CSP
供应商设备封装: 24-LFCSP-VQ(4x4)
包装: 标准包装
其它名称: ADA4930-2YCPZ-R2DKR
ADA4930-1/ADA4930-2
Rev. A | Page 23 of 28
LAYOUT, GROUNDING, AND BYPASSING
The ADA4930-1/ADA4930-2 are high speed devices. Realizing
their superior performance requires attention to the details of
high speed PCB design.
The first requirement is to use a multilayer PCB with solid ground
and power planes that cover as much of the board area as possible.
Bypass each power supply pin directly to a nearby ground plane, as
close to the device as possible. Use 0.1 μF high frequency ceramic
chip capacitors.
Provide low frequency bulk bypassing, using 10 μF tantalum
capacitors from each supply to ground.
Stray transmission line capacitance in combination with package
parasitics can potentially form a resonant circuit at high frequencies,
resulting in excessive gain peaking or possible oscillation.
Signal routing should be short and direct to avoid such parasitic
effects. Provide symmetrical layout for complementary signals
to maximize balanced performance.
0
92
09
-0
58
Figure 56. ADA4930-1 Ground and Power Plane Voiding
in the Vicinity of RF and RG
Use radio frequency transmission lines to connect the driver
and receiver to the amplifier.
Minimize stray capacitance at the input/output pins by clearing
the underlying ground and low impedance planes near these pins
If the driver/receiver is more than one-eighth of the wavelength
from the amplifier, the signal trace widths should be minimal.
This nontransmission line configuration requires the underlying
and adjacent ground and low impedance planes to be cleared
near the signal lines.
The exposed thermal paddle is internally connected to the ground
pin of the amplifier. Solder the paddle to the low impedance
ground plane on the PCB to ensure the specified electrical
performance and to provide thermal relief. To reduce thermal
impedance further, it is recommended that the ground planes
on all layers under the paddle be connected together with vias.
1.30
0.80
1.30
09
20
9-
0
59
Figure 57. Recommended PCB Thermal Attach Pad Dimensions (Millimeters)
0.8 mm
1.3 mm
POWER PLANE
GROUND PLANE
TOP METAL
BOTTOM METAL
09
20
9-
06
0
Figure 58. Cross-Section of 4-Layer PCB Showing Thermal Via Connection to Buried Ground Plane (Dimensions in Millimeters)
相关PDF资料
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