ADA4940-1/ADA4940-2
Data Sheet
Rev. C | Page 24 of 32
Table 15 an
d Table 16 list several common gain settings, recommended resistor values, input impedances, and output noise density for both
balanced and unbalanced input configurations.
Table 15. Differential Ground-Referenced Input, DC-Coupled, RL = 1 kΩ (See Figure 64) Nominal Gain (dB)
RF (Ω)
RG (Ω)
RIN, dm (Ω)
Differential Output Noise Density (nV/√Hz)
RTI (nV/√Hz)
0
1000
2000
11.3
6
1000
500
1000
15.4
7.7
10
1000
318
636
20.0
6.8
14
1000
196
392
27.7
5.5
Table 16. Single-Ended Ground-Referenced Input, DC-Coupled, RS = 50 Ω, RL = 1 kΩ (See Figure 65) Nominal Gain (dB)
RF (Ω)
RG (Ω)
RT (Ω)
RIN,se (Ω)
Differential Output Noise Density (nV/√Hz)
RTI (nV/√Hz)
0
1000
52.3
1333
1025
11.2
6
1000
500
53.6
750
526
15.0
7.5
10
1000
318
54.9
512
344
19.0
6.3
14
1000
196
59.0
337
223
25.3
5
1 RG1 = RG + (RS||RT)
IMPACT OF MISMATCHES IN THE FEEDBACK
NETWORKS
Even if the external feedback networks (RF/RG) are mismatched,
the internal common-mode feedback loop still forces the outputs
to remain balanced. The amplitudes of the signals at each output
remain equal and 180° out of phase. The input-to-output,
differential mode gain varies proportionately to the feedback
mismatch, but the output balance is unaffected.
As well as causing a noise contribution from VOCM, ratio-matching
errors in the external resistors result in a degradation of the ability
of the circuit to reject input common-mode signals, much the
same as for a four resistors difference amplifier made from a
conventional op amp.
In addition, if the dc levels of the input and output common-
mode voltages are different, matching errors result in a small
differential mode, output offset voltage. When G = 1, with a
ground-referenced input signal and the output common-mode
level set to 2.5 V, an output offset of as much as 25 mV (1% of
the difference in common-mode levels) can result if 1% tolerance
resistors are used. Resistors of 1% tolerance result in a worst-
case input CMRR of about 40 dB, a worst-case differential mode
output offset of 25 mV due to the 2.5 V level-shift, and no
significant degradation in output balance error.
CALCULATING THE INPUT IMPEDANCE OF AN
APPLICATION CIRCUIT
The effective input impedance of a circuit depends on whether
the amplifier is being driven by a single-ended or differential
signal source. For balanced differential input signals, as shown
(+DIN and DIN) is simply RIN, dm = 2 × RG.
For an unbalanced, single-ended input signal (se
e Figure 65), the
input impedance is
F
G
F
G
se
IN
R
2
1
,
+VS
ADA4940-1/
ADA4940-2
+IN
–IN
RF
+DIN
–DIN
VOCM
RG
VOUT, dm
08
45
2-
05
1
RT
RS
ADA4940-1/
ADA4940-2
+VS
RF
RG
RS
RG
RF
VOCM
RT
VOUT, dm
08
452
-052
+IN
–IN
Input
The input impedance of the circuit is effectively higher than it
would be for a conventional op amp connected as an inverter
because a fraction of the differential output voltage appears at
the inputs as a common-mode signal, partially bootstrapping
the voltage across the input resistor RG1.