参数资料
型号: ADAV4601BSTZ
厂商: Analog Devices Inc
文件页数: 43/60页
文件大小: 0K
描述: IC AUDIO CODEC PROCESSOR 80-LQFP
标准包装: 1
系列: SigmaDSP®
类型: 音频处理器
应用: TV
安装类型: 表面贴装
封装/外壳: 80-LQFP
供应商设备封装: 80-LQFP(14x14)
包装: 托盘
ADAV4601
Rev. B | Page 48 of 60
MAIN CONTROL REGISTERS
DETAILED REGISTER DESCRIPTIONS
Address 0x0000 Initialization Control Register (Default: 0x0080)
Table 45.
Bit No.
Bit Name
Description
Default
Bits[15:13]
Reserved
Always write as 0 if writing to this register.
000
Bit[12]
Slew mute
When set to 1, all slew parameters ramp to zero. It is recommended to set this
bit to 1 prior to downloading a new program to reduce any risk of pops or clicks
on the output.
0
0b = unmuted
1b = muted
Bit[11]
Reserved
Always write as 0 if writing to this register.
0
Bits[10:9]
MCLKI frequency select
Used to select the MCLKI pin frequency.
00
00b = 512 × frequency sample (FS) (24.576 MHz)
01b = 256 × FS (12.288 MHz)
10b = 128 × FS (6.144 MHz)
11b = 64 × FS (3.072 MHz)
Bits[8:7]
SRC2 Channel A input select
Used to select the source for SRC2 Channel A.
01
00b = SDIN0
01b = SDIN1
10b = SDIN2
11b = SDIN3
Bits[6:5]
SRC1 input select
Used to select the source for SRC1.
00
00b = SDIN0
01b = SDIN1
10b = SDIN2
11b = SDIN3
Bit[4]
SRC2 Channel A enable
Used to enable SRC2 Channel A.
0
0b = disabled
1b = enabled
Bit[3]
SRC1 enable
Used to enable SRC1 Channel A.
0
0b = disabled
1b = enabled
Bit[2]
GSB enable
When set to 1, the ADAV4601 enters standby mode.
0
0b = disable standby or not in standby
1b = enable standby or not in standby
Bit[1]
Audio processor enable
Set to 1 to enable the audio processor.
0
0b = disabled
1b = enabled
Bit[0]
GPU
Globally powers up all parts of the device. If read back, it indicates the status of
the global power-up.
0
0b = use power management register
1b = global power-up
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