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| 型号： | ADM1041AARQZ |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 通信及网络 |
| 英文描述： | Secondary-Side Controller with Current Share and Housekeeping |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO24 |
| 封装： | LEAD FREE, MO-137AE, QSOP-24 |
| 文件页数： | 39/56页 |
| 文件大小： | 991K |
| 代理商： | ADM1041AARQZ |
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ADM1041A
DETAILED REGISTER DESCRIPTIONS
Table 9. Register 00h, Status1. Power-On Default XXh (refer to the logic schematic in Figure 24 and to Table 43.)
Rev. 0 | Page 39 of 56
Bit No.
7
6
5
4
3
2
1
0
Name
OV Fault
UV Fault
OCP Timeout
Mon1 Flag
Mon2 Flag
Mon3 Flag
Mon4 Flag
Mon5 Flag
R/W
R
R
R
R
R
R
R
R
Description
1= Overvoltage fault has occurred.
1= Undervoltage fault has occurred.
1= Overcurrent has occured and timed out (ocpf is in the Status3 Register).
1= MON1 flag.
1= MON2 flag.
1= MON3 flag.
1= MON4 flag.
1= MON5 flag.
Table 10. Register 01h, Status2. Power-On Default XXh (refer to the logic schematic in Figure 24 and to Table 43.)
Bit No.
7
6
5
4
3
2
1
0
Name
Share_OK
OrFET_OK
REVERSE_OK
V
DD
_OK
GND_OK
Intref_OK
Extrefok_OK
V
DD
OV
R/W
R
R
R
R
R
R
R
R
Description
1= Current share is within limits.
1= OR’ing MOSFET is on.
1= Reverse OK—reverse voltage across the ORing MOSFET is within limits.
1= V
DD
is within limits.
1= Connection of GND pin is good.
1= Internal voltage reference is within limits.
1= External voltage reference is within limits.
1= V
DD
is above its OV threshold.
Table 11. Register 02h, Status3. Power-On Default XXh (refer to the logic schematic in Figure 24 and to Table 43.)
Bit No.
7
6
5
4
3
2
1
0
Table 12. Register 03h, Calibration Bits. Power-On Default from EEPROM Register 8103h During Power-Up
Bit No.
Name
R/W
7–6
Reverse Voltage Off Threshold
R/W
5–4
Reverse Voltage On Threshold
R/W
3
PEN_GATE
R/W
2
Gate Ramp
R/W
Name
m_acsns_r
m_pson_r
m_penok_r
m_psonok_r
m_DC_OK_r
ocpf
PULSE_OK
fault
R/W
R
R
R
R
R
R
R
R
Description
Reflects the status on AC
SENSE
1/AC
SENSE
2.
Reflects the status of PSON.
Reflects the status of PEN.
Status of PS
ON
LINK.
Status of DC_OK.
1= An overcurrent has occured, direct from comparator.
1= Pulses are present at the PULSE pin.
1= Fault latch.
Description
Reverse Voltage Detector Turn-Off Threshold:
b7
b6
Function
0
0
100 mV
0
1
150 mV
1
0
200 mV
1
1
250 mV
Reverse Voltage Detector Turn On Threshold:
b5
b4
Function
0
0
20 mV
0
1
30 mV
1
0
40 mV
1
1
50 mV
Gate pen option. When set, PEN is gated by AC_OK.
Gate ramp option. When set, soft start is gated by AC_OK.
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| ADM1041ARQ-2 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
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