参数资料
型号: ADM1060
厂商: Analog Devices, Inc.
英文描述: DIP Socket; No. of Contacts:56; Pitch Spacing:0.07"; Row Spacing:0.6"; Terminal Type:PC Board; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):No RoHS Compliant: Yes
中文描述: 通信系统监控/排序电路
文件页数: 26/45页
文件大小: 303K
代理商: ADM1060
ADM1060
ADM1060 LOGIC
26
REV. PrJ 11/02
PRELIMINARY TECHNICAL DATA
T ABL E 33. BIT MAP F OR PNGPIIMK RE GIST E RS (POWE R- ON DE F AUL T 00H)
Bit
Name
R/W
Description
7-4
AIM K 4-AIM K 1
R /W
If high,
mask
the
GPIn
input before it is used in function A
3-0
BIM K 4-BIM K 1
R /W
If high,
mask
the
GPIn
input before it is used in function B
PLB1
PLB2
PLB3
PLB4
PLB5
PLB6
PLB7
PLB8
PLB9
05H
15H
25H
35H
45H
55H
65H
75H
85H
7
Function A
G PI1
G PI1
G PI1
G PI1
G PI1
G PI1
G PI1
G PI1
G PI1
6
G PI2
G PI2
G PI2
G PI2
G PI2
G PI2
G PI2
G PI2
G PI2
5
G PI3
G PI3
G PI3
G PI3
G PI3
G PI3
G PI3
G PI3
G PI3
4
G PI4
G PI4
G PI4
G PI4
G PI4
G PI4
G PI4
G PI4
G PI4
3
Function B
G PI1
G PI1
G PI1
G PI1
G PI1
G PI1
G PI1
G PI1
G PI1
2
G PI2
G PI2
G PI2
G PI2
G PI2
G PI2
G PI2
G PI2
G PI2
1
G PI3
G PI3
G PI3
G PI3
G PI3
G PI3
G PI3
G PI3
G PI3
0
G PI4
G PI4
G PI4
G PI4
G PI4
G PI4
G PI4
G PI4
G PI4
T ABL E 34. PnWD IC F G R E GIST E R S 06H,16H,26H,36H,46H,56H,66H,76H,86H (POWE R - ON D E F AUL T 00H)
Bit
7
Name
A POL P
R/W
R /W
Description
If high, invert the pulsed WDI input before it is used in function A
6
A IM K P R /W
If high, mask the pulsed WDI input before it is used in function A
5
A POL L
R /W
If high, invert the latched WDI input before it is used in function A
4
A IM K L
R /W
If high, mask the latched WDI input before it is used in function A
3
BPOL P
R /W
If high, invert the pulsed WDI input before it is used in function B
2
BIM K P R /W
If high, mask the pulsed WDI input before it is used in function B
1
BPOL L
R /W
If high, invert the latched WDI input before it is used in function B
0
BIM K L
R /W
If high, mask the latched WDI input before it is used in function B
T ABL E 35. PnE N R E GIST E R S 07H,17H,27H,37H,47H,57H,67H,77H,87H (POWE R - ON D E F AUL T 00H)
Bit
Name
R/W
Description
7-3
Reserved N/A
Cannot be used
2
IN V OP
R /W
If high, invert the PLB output
1
E NA
R /W
If high, enable function A
0
E N B
R /W
If high, enable function B
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