参数资料
型号: ADM1060
厂商: Analog Devices, Inc.
英文描述: DIP Socket; No. of Contacts:56; Pitch Spacing:0.07"; Row Spacing:0.6"; Terminal Type:PC Board; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):No RoHS Compliant: Yes
中文描述: 通信系统监控/排序电路
文件页数: 35/45页
文件大小: 303K
代理商: ADM1060
ADM1060 STATUS/FAULTS
ADM1060
PRELIMINARY TECHNICAL DATA
35
REV. PrJ 11/02
MASK REGISTERS
T ABL E 50. L IST OF MASK RE GIST E RS
Hex
T able
Addr.
Name
D efault
Power On Value
Description
9D
51
E R R M A SK 1
00h
Error Mask Register for the 7 SFD
s
9E
52
E R R M A SK 2
00h
Error Mask Register for the 4 GPI
s and the Watchdog Detector
T ABL E 51. BIT MAP F OR E RRMASK 1 RE GIST E R 9DH (POWE R- ON DE F AUL T 00H)
Bit
Name
R/W
Description
7
Reserved
X
Unused
6
V P4M A SK
R /W
If high, then a fault occurring on the supply at input VP4 is ignored, and not logged in LAT F1
5
V P3M A SK
R /W
If high, then a fault occurring on the supply at input VP3 is ignored, and not logged in LAT F1
4
V P2M A SK
R /W
If high, then a fault occurring on the supply at input VP2 is ignored, and not logged in LAT F1
3
V P1M A SK
R /W
If high, then a fault occurring on the supply at input VP1 is ignored, and not logged in LAT F1
2
V H M A SK
R /W
If high, then a fault occurring on the supply at input VH is ignored, and not logged in LAT F1
1
V B2M A SK
R /W
If high, then a fault occurring on the supply at input VB2 is ignored, and not logged in LAT F1
0
V B1M A SK
R /W
If high, then a fault occurring on the supply at input VB1 is ignored, and not logged in LAT F1
T ABL E 52. BIT MAP F OR E RRMASK 2 RE GIST E R 9E H (POWE R- ON DE F AUL T 00H)
Bit
Name
R/W
Description
7-5
Reserved
X
Unused
4
W D IM A SK
R /W
If high, then a change in the logic level on the WDI output is ignored, and not logged in LAT F2
3
G PI4M A SK
R /W
If high, then a change in the logic level on the GPI4 input is ignored, and not logged in LAT F2
2
G PI3M A SK
R /W
If high, then a change in the logic level on the GPI3 input is ignored, and not logged in LAT F2
1
G PI2M A SK
R /W
If high, then a change in the logic level on the GPI2 input is ignored, and not logged in LAT F2
0
G PI1M A SK
R /W
If high, then a change in the logic level on the GPI1 input is ignored, and not logged in LAT F2
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