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参数资料
| 型号： | ADN2526ACPZ-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/16页 |
| 文件大小： | 0K |
| 描述： | IC LASER DRIVER 11.3GBPS 16LFCSP |
| 标准包装： | 1,500 |
| 类型： | 激光二极管驱动器 |
| 数据速率： | 11.3Gbps |
| 通道数： | 1 |
| 电源电压： | 3 V ~ 3.6 V |
| 电流 - 电源： | 46mA |
| 电流 - 调制： | 80mA |
| 电流 - 偏置： | 100mA |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 16-LFCSP-VQ |
| 包装： | 带卷 (TR) |
| 安装类型： | 表面贴装 |
Data Sheet
ADN2526
IBIAS
VCC
Table 5. ALS Functions
VCC
100?
2?
2k?
ALS Logic State
High
Low
Floating
IBIAS and IMOD
Disabled
Enabled
Enabled
The ALS pin is compatible with 3.3 V CMOS and LVTTL logic
Figure 21. Equivalent Circuit of the IBIAS Pin
VCC
VCC
VCC
VCC
500?
ALS
100?
40k?
2k?
100?
VCC
IBMON
Figure 22. Equivalent Circuit of the IBMON Pin
The recommended configuration for BSET, IBIAS, and IBMON
Figure 24. Equivalent Circuit of the ALS Pin
MODULATION CURRENT
The modulation current can be controlled by applying a dc
voltage to the MSET pin. This voltage is converted into a dc
current by using a voltage-to-current converter using an
operational amplifier and a bipolar transistor, as shown in
TO LASER CATHODE
VCC
L
IBIAS
IBIAS
ADN2526
50?
IMOD
IMODP
IMODN
V BSET
BSET
GND
IBMON
R
1k?
IBMON
MSET
FROM INPUT STAGE
g m × V O
800?
Figure 23. Recommended Configuration for the BSET, IBIAS, and IBMON Pins
V O
The circuit used to drive the BSET voltage must be able to drive
the 1 k? input resistance of the BSET pin. For proper operation
200?
ADN2526
of the bias current source, the voltage at the IBIAS pin must be
between the compliance voltage specifications for this pin over
supply, temperature, and bias current range (see Table 1). The
maximum compliance voltage is specified for only two bias
current levels (10 mA and 100 mA), but it can be calculated for
any bias current by
GND
Figure 25. Generation of Modulation Current on the ADN2526
This dc current is switched by the data signal applied to the
input stage (DATAP and DATAN pins) and amplified by the
output stage to generate the differential modulation current at
the IMODP and IMODN pins.
V COMPLIANCE_MAX (V) = VCC (V) ? 0.75 ? 4.4 × IBIAS
(1)
The output stage also generates the active back-termination,
See the Applications Information section for examples of
headroom calculations.
The function of the inductor, L, is to isolate the capacitance of
the IBIAS output from the high frequency signal path. For
AUTOMATIC LASER SHUTDOWN (ALS)
The ALS pin is a digital input that enables/disables both the bias
and modulation currents, depending on the logic state applied,
which provides proper transmission line termination. Active
back-termination uses feedback around an active circuit to
synthesize a broadband termination resistance. This provides
excellent transmission line termination, while dissipating less
power than a traditional resistor passive back-termination.
A small portion of the modulation current flows in the virtual
50 ? active back-termination resistor. All of the preset IMOD
modulation current, the range specified in Table 1, flows into
the external load. The equivalent circuits for MSET, IMODP, and
IMODN are shown in Figure 26 and Figure 27. The two 25 ?
resistors in Figure 27 are not actual resistors. They represent the
active back-termination resistance.
Rev. B | Page 11 of 16
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