参数资料
| 型号： | ADN4605ABPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 22/56页 |
| 文件大小： | 0K |
| 描述： | IC CROSSPOINT SWITCH 352BGA |
| 标准包装： | 1 |
| 系列： | XStream™ |
| 功能： | 交叉点开关 |
| 电路： | 1 x 40:40 |
| 电压电源： | 单电源 |
| 电压 - 电源，单路/双路(±)： | 2.25 V ~ 3.6 V |
| 电流 - 电源： | 55mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 352-LBGA 裸露焊盘 |
| 供应商设备封装： | 352-BGA-EP（35x35） |
| 包装： | 托盘 |
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Data Sheet
ADN4605
Rev. A | Page 29 of 56
TRANSMITTERS
Output Structure and Output Levels
The ADN4605 transmitter outputs incorporate 50 termin-
ation resistors, ESD protection, and output current switches.
Each channel provides independent control of both the absolute
output level and the preemphasis output level. Note that the
choice of output current affects the output common-mode level.
Preemphasis
Transmission line attenuation can be equalized at the trans-
mitter using preemphasis. The transmit equalizer setting can
be chosen by matching the channel loss to the amount of boost
provided by the preemphasis.
Transmitter preemphasis levels, as well as dc output levels, can
be set through either the serial or parallel control interface.
Table 12 summarizes the absolute output levels and
preemphasis level control settings. The output level control sets
the dc current level, and the preemphasis level control sets the
PE current in the transmitter, as shown in Figure 43. The full
resolution of eight settings is available through the serial or
parallel interface. A single setting can be programmed to all
outputs simultaneously by writing to the TX Lane Control
Broadcast Register (Address 0xA8).
In addition to the enabled state, the Tx has three possible
disabled states (standby, squelched, and disabled) controlled
by the Tx Drive Control registers (Address 0xB0 to Address
0xB9) shown in Table 13. Disabled is the lowest power-down
state. When squelched, the output voltage at both the P and N
outputs is the common-mode voltage as defined by the output
current settings. Note that the squelch feature is only available
when using a 3.3 V core supply voltage (VCC). In standby, the
output level of both P and N outputs is pulled up to the
termination supply (VTTOA or VTTOB).
ON-CHIP TERMINATION
ESD
VCC
VTTOx
OPx
ONx
VEE
V3
VC
V2
VP
V1
VN
Q1
IDC + IPE = IT
Q2
RP
50
RN
50
09796-
010
Figure 43. Simplified Tx Output Circuit
Table 12. Preemphasis and Output Level Settings
Register Address
Default
Register Name
Bits
Bit Name
Description
0x80 (Output 0) to 0xA7 (Output 39)
and 0xA8 (Tx Broadcast)
0x40
Tx Lane Control Output 0 to Tx
Lane Control Output 39 and Tx
Broadcast
7
Reserved
0 (Reserve bit)
6:4
OLEV
000: 0 mA
001: 4 mA
010: 8 mA
011: 12 mA
100: 16 mA
101: 20 mA
110: 24 mA
111: (Reserve bit)
3
Overdrive
1: overdrive (increases OLEV and
PE currents by 25%)
0: no overdrive
2:0
PE
000: 0 mA
001: 2 mA
010: 3 mA
011: 4 mA
100: 5 mA
101: 6 mA
110: 7 mA
111: 8 mA
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