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参数资料
| 型号： | ADP1048DC1-EVALZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 45/84页 |
| 文件大小： | 0K |
| 描述： | DAUGHTERCARD ADP1048 |
| 标准包装： | 1 |
| 主要目的： | 电源管理，功率因数校正 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ADP1048 |
| 次要属性： | USB，I2C接口 |
| 已供物品： | 板 |
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Data Sheet
DETAILED REGISTER DESCRIPTIONS
OPERATION REGISTER
Table 17. Register 0x01—OPERATION
ADP1047/ADP1048
Bits
7
Bit Name
Enable
R/W
R/W
Description
This bit determines the device response to the OPERATION command.
0 = immediate off (no sequencing).
1 = device on.
6
[5:4]
[3:2]
[1:0]
RSVD
Margin control
Margin fault
response
RSVD
R
R
R
R
Always reads as 0.
These bits set the output voltage margin level and are hardcoded to a value of 00.
These bits set the device response to an output OVP/UVP warning or fault after the output is
margined. These bits are hardcoded to a value of 01.
Reserved.
ON_OFF_CONFIG REGISTER
Table 18. Register 0x02—ON_OFF_CONFIG
Bits
[7:5]
4
Bit Name
RSVD
Power-up control
R/W
R
R/W
Description
Reserved.
Set the device power-up response.
0 = device powers up when power is present.
1 = device powers up only when commanded by the control pin (PSON) and the OPERATION
command.
3
Command
enable
R/W
Control how the device responds to the OPERATION command.
0 = ignore the OPERATION command.
1 = the OPERATION command must be set to 1 to enable the device (in addition to setting Bit 2).
2
Pin enable
R/W
Control how the device responds to the value of the control pin (PSON).
0 = ignore the control pin (PSON).
1 = the control pin must be asserted to enable the device (in addition to setting Bit 3).
1
Control pin
polarity
R/W
Set the polarity of the control pin (PSON).
0 = active low.
1 = active high.
0
Power-down
delay
R
Actions to take on power-down. This bit always reads as 1 (turn off the output and stop energy
transfer to the output as fast as possible).
CLEAR_FAULTS COMMAND
Code 0x03, send byte, no data. This command clears all fault bits in all registers simultaneously.
WRITE_PROTECT REGISTER
Table 19. Register 0x10—WRITE_PROTECT
Bits
7
6
Bit Name
Write Protect 1
Write Protect 2
R/W
R/W
R/W
Description
Setting this bit disables writes to all commands except for WRITE_PROTECT.
Setting this bit disables writes to all commands except for WRITE_PROTECT, OPERATION, and
EEPROM_PAGE_ERASE.
5
Write Protect 3
R/W
Setting this bit disables writes to all commands except for WRITE_PROTECT, OPERATION,
EEPROM_PAGE_ERASE, ON_OFF_CONFIG, and VOUT_COMMAND.
[4:0]
RSVD
R
Reserved.
RESTORE_DEFAULT_ALL COMMAND
Code 0x12, send byte, no data. This command downloads the factory default parameters from EEPROM into operating memory.
STORE_USER_ALL COMMAND
Code 0x15, send byte, no data. This command copies the entire contents of operating memory into EEPROM (Page 1 of the main block).
Rev. 0 | Page 45 of 84
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