参数资料
型号: ADP1048DC1-EVALZ
厂商: Analog Devices Inc
文件页数: 71/84页
文件大小: 0K
描述: DAUGHTERCARD ADP1048
标准包装: 1
主要目的: 电源管理,功率因数校正
嵌入式:
已用 IC / 零件: ADP1048
次要属性: USB,I2C接口
已供物品:
Data Sheet
INRUSH SET REGISTER
Table 107. Register 0xFE2E—Inrush Set
ADP1047/ADP1048
Bits
[7:5]
[4:3]
[2:0]
Bit Name
RSVD
Timer
Inrush delay time
R/W
R
R/W
R/W
Description
Reserved.
These bits set the timer for the VIN_LOW flag measurement.
Bit 4
Bit 3
Timer
0
0
Quarter line cycle
0
1
Half line cycle
1
0
2 ms
1
1
4 ms
These bits set the inrush signal delay time after the BROWN_OUT flag goes low.
Bit 2
0
0
0
0
1
1
1
1
Bit 1
0
0
1
1
0
0
1
1
Bit 0
0
1
0
1
0
1
0
1
Number of Full AC Line Cycles
0
1
2
3
4
5
6
7
FAST_OVP_FAULT_RISE REGISTER
Table 108. Register 0xFE2F—FAST_OVP_FAULT_RISE
Bits
7
[6:0]
Bit Name
RSVD
Fast OVP rise threshold
R/W
R
R/W
Description
Reserved.
These bits set the rising threshold for the analog comparator at the OVP pin input as follows:
OVP threshold = ( Code × 0.492/128) + 1.
This threshold is programmable from 1 V to 1.5 V. Each LSB increments the threshold by 3.844 mV.
A value of 0x00 corresponds to a 1 V threshold; a value of 0x3F corresponds to a 1.492 V threshold.
FAST_OVP_FAULT_FALL REGISTER
Table 109. Register 0xFE30—FAST_OVP_FAULT_FALL
Bits
7
[6:0]
Bit Name
RSVD
Fast OVP fall threshold
R/W
R
R/W
Description
Reserved.
These bits set the falling threshold for the analog comparator at the OVP pin input as follows:
OVP threshold = ( Code × 0.492/128) + 1.
This threshold is programmable from 1 V to 1.5 V. Each LSB increments the threshold by 3.844 mV.
A value of 0x00 corresponds to a 1 V threshold; a value of 0x3F corresponds to a 1.492 V threshold.
FAST OVP DEBOUNCE TIME SETTING REGISTER
Table 110. Register 0xFE31—Fast OVP Debounce Time Setting
Bits
[7:2]
[1:0]
Bit Name
RSVD
OVP debounce time
R/W
R
R/W
Description
Reserved.
These bits set the fast OVP debounce time.
Bit 1
Bit 0
Time
0
0
120 ns
0
1
240 ns
1
0
480 ns
1
1
640 ns
Rev. 0 | Page 71 of 84
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