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| 型号： | ADP1828ACPZ-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 17/36页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 20LFCSP |
| 标准包装： | 1,500 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 720kHz |
| 占空比： | 93% |
| 电源电压： | 3 V ~ 20 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 20-WFQFN 裸露焊盘，CSP |
| 包装： | 带卷 (TR) |
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ADP1828
The PV pin provides power to the low-side drivers. It is limited
to 5.5 V maximum input and should have a local decoupling
with f OSC . The 2× output is suitable for synchronizing the dual
channel ADP1829 controller (see Table 4).
capacitor to PGND.
The synchronous rectifier is turned on for a minimum time
of about 200 ns on every switching cycle in order to sense the
current. This minimum off-time plus the nonoverlap dead time
puts a limit on the maximum high-side switch duty cycle based
on the selected switching frequency. Typically, this maximum
duty cycle is about 90% at 300 kHz switching. At 1.2 MHz
switching, it reduces to about 70% maximum duty cycle.
Table 4. CLKOUT Truth Table 1
EN CLKSET SYNC CLKOUT
H L H/L 1× f OSC
H H H/L 2× f OSC
H X Clock in Clock
L X X L
Comment
180° out of phase with f OSC
In phase with f OSC
CLKOUT in-sync with
clock in
CLKOUT is low
SETTING THE OUTPUT VOLTAGE
1
X: don’t care, H: Logic high, L: Logic low.
The output voltage is set using a resistive voltage divider from
the output to FB. The voltage divider splits the output voltage
to the 0.6 V FB regulation voltage to set the regulation output
voltage. The output voltage can be set to as low as 0.6 V and as
high as 85% of the power input voltage.
SWITCHING FREQUENCY CONTROL AND
SYNCHRONIZATION
The ADP1828 has a logic controlled frequency select input,
FREQ, which sets the switching frequency to 300 kHz or
600 kHz. Drive FREQ low at 300 kHz and high at 600 kHz.
The frequency can also be set to between 300 kHz and 600 kHz
by connecting a resistor between FREQ and GND. A 24.9 kΩ
sets the frequency to 600 kHz, 35.7 kΩ to 450 kHz, and 57.6 kΩ
to 300 kHz. Figure 34 shows f OSC as a function of R FREQ .
To synchronize the ADP1828 switching frequency to an
external signal, drive the SYNC input with an external clock
or with the CLKOUT signal from another ADP1828. The
ADP1828 can be synchronized to between 1× and 2× the
internal oscillator frequency. If f OSC is set by R FREQ , then the
synchronization frequency range is from f OSC up to 600 kHz.
Driving SYNC faster than recommended for the FREQ setting
results in a small ramp signal, which could affect the signal-to-
noise ratio and the modulator gain and stability.
When an external clock is detected at the first SYNC edge, the
internal oscillator is reset and the clock control shifts to SYNC.
The SYNC edges then trigger subsequent clocking of the PWM
outputs. The high-side MOSFET turn-on follows the rising edge
of the sync input by approximately 320 ns (see Figure 35 for
an illustration). If the external SYNC signal disappears during
600
550
500
450
V IN = 3V
T A = 25°C
operation, the ADP1828 reverts to its internal oscillator and
experiences a delay of no more than a single cycle of the
internal oscillator.
400
350
300
V IN = 5V
SYNC
320ns
DH
250
200
24000
29000
34000
39000
44000
49000
54000
59000
DT
DT (DEAD TIME) = 40ns
R FREQ ( ? )
Figure 34. f OSC vs. R FREQ
The SYNC input is used to synchronize the converter switching
DL
Figure 35. Synchronization
frequency to an external signal. This allows multiple ADP1828
converters to be operated at the same frequency to prevent
frequency beating or other interactions. The ADP1828 has a
clock output (CLKOUT), which can be used for synchronizing
the ADP1829 and other ADP1828 controllers, thus eliminating
the need for an external clock source. Pulling CLKSET low sets
the frequency at CLKOUT to 1× the internal oscillator frequency,
f OSC , and is 180° out of phase with f OSC . The 1× output is suitable
for synchronizing other ADP1828s. Setting CLKSET high
(connect to VREG) sets the frequency to 2× f OSC and is in phase
Rev. C | Page 17 of 36
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP1828-BL1-EVZ | 制造商:Analog Devices 功能描述:BLANK ADISIMPOWER EVAL ADP1828 - Boxed Product (Development Kits) |
| ADP1828-BL2-EVZ | 制造商:Analog Devices 功能描述:BLANK ADISIMPOWER EVAL ADP1828 - Boxed Product (Development Kits) |
| ADP1828HC-EVALZ | 功能描述:BOARD EVALUATION ADP1828HC RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ADP1828LC-EVALZ | 功能描述:BOARD EVALUATION ADP1828LC RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ADP1828YRQZ-R7 | 功能描述:IC REG CTRLR BUCK PWM VM 20-QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
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